公开(公告)号：US11264333B2

公开(公告)日：2022-03-01

申请号：US16870843

申请日：2020-05-08

申请人： Applied Materials, Inc.

发明人： Han-Wen Chen ,  Steven Verhaverbeke ,  Guan Huei See ,  Giback Park ,  Giorgio Cellere ,  Diego Tonini ,  Vincent Dicaprio ,  Kyuil Cho

IPC分类号： H01L23/538 ,  H01L21/48 ,  H01L23/13 ,  H01L23/14 ,  H01L23/498 ,  H01L25/10 ,  H01L23/66 ,  H01Q1/22 ,  H01Q1/24 ,  H05K1/02 ,  H01L21/50 ,  H01L21/768 ,  H01L25/065 ,  H01L27/06 ,  H01L21/60

摘要： The present disclosure relates to thin-form-factor reconstituted substrates and methods for forming the same. The reconstituted substrates described herein may be utilized to fabricate homogeneous or heterogeneous high-density 3D integrated devices. In one embodiment, a silicon substrate is structured by direct laser patterning to include one or more cavities and one or more vias. One or more semiconductor dies of the same or different types may be placed within the cavities and thereafter embedded in the substrate upon formation of an insulating layer thereon. One or more conductive interconnections are formed in the vias and may have contact points redistributed to desired surfaces of the reconstituted substrate. The reconstituted substrate may thereafter be integrated into a stacked 3D device.

公开(公告)号：US20220028769A1

公开(公告)日：2022-01-27

申请号：US17498328

申请日：2021-10-11

申请人： STMicroelectronics S.r.l.

发明人： Federico Giovanni ZIGLIOLI

IPC分类号： H01L23/498 ,  H01L23/31 ,  H01L21/48 ,  H01L21/768 ,  H01L23/00 ,  H01L21/60

摘要： A semiconductor chip is mounted on a leadframe. A first portion of an insulating package for the semiconductor chip is formed from laser direct structuring (LDS) material molded onto the semiconductor chip. A conductive formation (provided by laser-drilling the LDS material and plating) extends between the outer surface of the first portion of insulating package and the semiconductor chip. An electrically conductive clip is applied onto the outer surface of the first portion of the insulating package, with the electrically conductive clip electrically coupled to the conductive formation and the leadframe. A second portion of the insulating package is made from package molding material (epoxy compound) molded onto the electrically conductive clip and applied onto the outer surface of the first portion of the insulating package.

公开(公告)号：US11204327B2

公开(公告)日：2021-12-21

申请号：US16691007

申请日：2019-11-21

申请人： Massachusetts Institute of Technology

发明人： Eveline Postelnicu ,  Samarth Aggarwal ,  Kazumi Wada ,  Jurgen Michel ,  Lionel C. Kimerling ,  Michelle L. Clark ,  Anuradha M. Agarwal

IPC分类号： G01N21/77 ,  G02B6/125 ,  H01L21/60 ,  H01L21/02

摘要： A layer of amorphous Ge is formed on a substrate using electron-beam evaporation. The evaporation is performed at room temperature. The layer of amorphous Ge has a thickness of at least 50 nm and a purity of at least 90% Ge. The substrate is complementary metal-oxide-semiconductor (CMOS) compatible and is transparent at Long-Wave Infrared (LWIR) wavelengths. The layer of amorphous Ge can be used as a waveguide in chemical sensing and data communication applications. The amorphous Ge waveguide has a transmission loss in the LWIR of 11 dB/cm or less at 8 μm.

公开(公告)号：US11178773B2

公开(公告)日：2021-11-16

申请号：US16949509

申请日：2020-10-30

申请人： Sheng-Kun Lan

发明人： Sheng-Kun Lan

IPC分类号： H05K1/02 ,  H05K1/03 ,  H05K1/09 ,  H05K1/11 ,  H05K1/18 ,  H05K3/00 ,  H05K3/10 ,  H05K3/18 ,  H05K3/24 ,  H05K3/28 ,  H05K3/42 ,  H05K3/46 ,  H01L21/00 ,  H01L21/58 ,  H01L21/60 ,  H01L23/48 ,  H01L23/52 ,  H01L23/66 ,  H01L23/488 ,  H01L23/528

摘要： A conductor trace structure reducing insertion loss of circuit board, the circuit board laminates an outer layer circuit board, an inner layer circuit board and a glass fiber resin films which arranged between each board; before laminated process, the conductor traces of the inner layers had formed by etching of imaging transfer process and conductor traces had been roughed process for making the glass fiber resin films having good adhesive performance during laminating; before etching of imaging transfer process that forms the conductor traces of the outer layers or solder resist coat process or coating polymer materials, the conductor traces have been roughed process to make insulating resin layer of the solder resist coat or polymer materials to has better associativity; wherein a smooth trench is formed by physical or chemical process constructed on the roughed conductor traces surface to guide electric ions transmitted on these smooth trench surface to enhance electric ions transmission rate, resulting in reducing the impedance so as to achieve reducing insertion loss.

公开(公告)号：US11145582B2

公开(公告)日：2021-10-12

申请号：US16707875

申请日：2019-12-09

申请人： STMicroelectronics S.r.l.

发明人： Federico Giovanni Ziglioli

IPC分类号： H01L23/00 ,  H01L23/498 ,  H01L21/48 ,  H01L21/768 ,  H01L23/31 ,  H01L21/60

摘要： A semiconductor chip is mounted on a leadframe. A first portion of an insulating package for the semiconductor chip is formed from laser direct structuring (LDS) material molded onto the semiconductor chip. A conductive formation (provided by laser-drilling the LDS material and plating) extends between the outer surface of the first portion of insulating package and the semiconductor chip. An electrically conductive clip is applied onto the outer surface of the first portion of the insulating package, with the electrically conductive clip electrically coupled to the conductive formation and the leadframe. A second portion of the insulating package is made from package molding material (epoxy compound) molded onto the electrically conductive clip and applied onto the outer surface of the first portion of the insulating package.

公开(公告)号：US11133281B2

公开(公告)日：2021-09-28

申请号：US16375479

申请日：2019-04-04

申请人： Infineon Technologies AG

发明人： Khay Chwan Saw ,  Chau Fatt Chiang ,  Stefan Macheiner ,  Wae Chet Yong

IPC分类号： H01L23/00 ,  H01L23/31 ,  H01L21/48 ,  H01L21/56 ,  H01L23/495 ,  H01L23/29 ,  H01L25/065 ,  H01L23/52 ,  H01L21/60

摘要： A packaged semiconductor includes an electrically insulating encapsulant body having an upper surface, a first semiconductor die encapsulated within the encapsulant body, the first semiconductor die having a main surface with a first conductive pad that faces the upper surface of the encapsulant body, a second semiconductor die encapsulated within the encapsulant body and disposed laterally side by side with the first semiconductor die, the second semiconductor die having a main surface with a second conductive pad that faces the upper surface of the encapsulant body, and a first conductive track that is formed in the upper surface of the encapsulant body and electrically connects the first conductive pad to the second conductive pad. The encapsulant body includes a laser activatable mold compound.

公开(公告)号：US11094559B2

公开(公告)日：2021-08-17

申请号：US16604252

申请日：2018-04-18

申请人： OSRAM OLED GmbH

发明人： Mathias Wendt ,  Andreas Weimar

IPC分类号： H01L21/48 ,  H01L21/768 ,  H01L23/498 ,  H01L23/00 ,  H01L21/60

摘要： A method of attaching a semiconductor chip on a lead frame includes A) providing a semiconductor chip, B) applying a solder metal layer sequence to the semiconductor chip, wherein the solder metal layer sequence includes a first metallic layer including indium or an indium-tin alloy, C) providing a lead frame, D) applying a metallization layer sequence to the lead frame, wherein the metallization layer sequence includes a fourth layer including indium and/or tin arranged above the lead frame and a third layer including gold arranged above the fourth layer, E) forming an intermetallic intermediate layer including gold and indium, gold and tin or gold, tin and indium, G) applying the semiconductor chip to the lead frame via the solder metal layer sequence and the intermetallic intermediate layer, and H) heating the arrangement produced in G) to attach the semiconductor chip to the lead frame.

公开(公告)号：US11075091B2

公开(公告)日：2021-07-27

申请号：US16630974

申请日：2017-10-26

申请人： SHINDENGEN ELECTRIC MANUFACTURING CO., LTD.

发明人： Soichiro Umeda ,  Takenori Ishioka

IPC分类号： H01L23/00 ,  H01L23/495 ,  H01L21/48 ,  H01L21/60 ,  H01L21/56 ,  H01L21/8234

摘要： In a first step of a method of manufacturing a semiconductor device, a portion to be the first lead frame is formed by selectively punching a metal plate, furthermore, notch portions depressed in the reference direction are formed on both side surfaces of a portion, of the first lead frame where the first bent portion is formed, in line contact with the first conductive layer in the reference direction; in the second step of the method, a first bent portion is formed by bending the one end of the first lead frame so as to protrude downward along the reference direction; and in the third step of the method, the upper surface of the first conductive layer and the lower surface of the first bent portion of the first lead frame are joined at the end of the substrate, by the first conductive bonding material, furthermore, the upper surface of the first conductive layer and the notch portions of the first bent portion are joined, by embedding a part of the first conductive bonding material in the notch portions.

公开(公告)号：US11057992B2

公开(公告)日：2021-07-06

申请号：US16720242

申请日：2019-12-19

申请人： Mikuni Electron Corporation

发明人： Sakae Tanaka

IPC分类号： H05K1/00 ,  H05K1/02 ,  H05K1/09 ,  H05K1/11 ,  H05K1/18 ,  H05K3/00 ,  H05K3/30 ,  H05K3/32 ,  H05K3/34 ,  H05K3/36 ,  H01L21/00 ,  H01L21/02 ,  H01L21/50 ,  H01L21/56 ,  H01L21/60 ,  H01L23/48 ,  H01L23/485 ,  H01L23/498 ,  H05K1/03 ,  H05K3/10

摘要： A method for manufacturing connection structure, the method includes arranging conductive particles and a first composite on a first electrode located on a first surface of a first member, arranging a second composite on a region other than the first electrode of the first surface, arranging the first surface and a second surface of a second member where a second electrode is located, so that the first electrode and the second electrode are opposed to each other, pressing the first member and the second member; and curing the first composite and the second composite.

公开(公告)号：US20210167013A1

公开(公告)日：2021-06-03

申请号：US17175640

申请日：2021-02-13

申请人： Arm Limited

发明人： Marlin Wayne Frederick, JR. ,  Karen Lee Delk

IPC分类号： H01L23/528 ,  H01L23/50 ,  H01L21/66 ,  H01L21/768 ,  G06F30/398 ,  H01L25/00 ,  G06F30/394 ,  G06F119/06 ,  H01L21/60

摘要： An apparatus, a method, and a method of manufacturing an integrated circuit having a metal layer, metal wires within the metal layer being configured such that they have a regular pattern.