公开(公告)号：US09627264B2

公开(公告)日：2017-04-18

申请号：US15214826

申请日：2016-07-20

Applicant: Taiwan Semiconductor Manufacturing Company Limited

Inventor： Kuo-Cheng Ching ,  Guan-Lin Chen

IPC: H01L21/8238 ,  H01L21/8234 ,  H01L29/66 ,  H01L29/78

CPC classification number: H01L21/823431 ,  H01L21/823468 ,  H01L21/823481 ,  H01L27/0886 ,  H01L29/66545 ,  H01L29/6656 ,  H01L29/66818 ,  H01L29/7843 ,  H01L29/7846 ,  H01L29/7848 ,  H01L29/785

Abstract: A semiconductor device and method of formation are provided herein. A semiconductor device includes a fin having a doped region, in some embodiments. The semiconductor device includes a gate over a channel portion of the fin. The gate including a gate electrode over a gate dielectric between a first sidewall spacer and a second sidewall spacer. The first sidewall spacer includes an initial first sidewall spacer over a first portion of a dielectric material. The second sidewall spacer includes an initial second sidewall spacer over a second portion of the dielectric material.

公开(公告)号：US20160329250A1

公开(公告)日：2016-11-10

申请号：US15214826

申请日：2016-07-20

Applicant: Taiwan Semiconductor Manufacturing Company Limited

Inventor： Kuo-Cheng Ching ,  Guan-Lin Chen

IPC: H01L21/8234 ,  H01L29/78 ,  H01L29/66

CPC classification number: H01L21/823431 ,  H01L21/823468 ,  H01L21/823481 ,  H01L27/0886 ,  H01L29/66545 ,  H01L29/6656 ,  H01L29/66818 ,  H01L29/7843 ,  H01L29/7846 ,  H01L29/7848 ,  H01L29/785

Abstract: A semiconductor device and method of formation are provided herein. A semiconductor device includes a fin having a doped region, in some embodiments. The semiconductor device includes a gate over a channel portion of the fin. The gate including a gate electrode over a gate dielectric between a first sidewall spacer and a second sidewall spacer. The first sidewall spacer includes an initial first sidewall spacer over a first portion of a dielectric material. The second sidewall spacer includes an initial second sidewall spacer over a second portion of the dielectric material.

公开(公告)号：US09257559B2

公开(公告)日：2016-02-09

申请号：US14155793

申请日：2014-01-15

Applicant: Taiwan Semiconductor Manufacturing Company Limited

Inventor： Kuo-Cheng Ching ,  Chih-Hao Wang ,  Zhiqiang Wu ,  Carlos H. Diaz

IPC: H01L21/02 ,  H01L29/78 ,  H01L29/66 ,  H01L21/762 ,  H01L29/16 ,  H01L29/06

CPC classification number: H01L29/7851 ,  H01L21/02164 ,  H01L21/02236 ,  H01L21/02238 ,  H01L21/02255 ,  H01L21/76224 ,  H01L21/76235 ,  H01L29/0638 ,  H01L29/0649 ,  H01L29/16 ,  H01L29/66795 ,  H01L29/7848 ,  H01L29/785

Abstract: A semiconductor device and method of formation are provided herein. A semiconductor device includes a fin having a first wall extending along a first plane, the fin including a doped region defining a first furrow on a first side of the first plane. A dielectric is disposed within the first furrow, such that the dielectric is in contact with the first furrow between a first end of the dielectric and a second end of the dielectric. The first end is separated a first distance from the first plane. The dielectric disposed within the furrow increases the isolation of a channel portion of adjacent fins, and thus decreases current leakage of a FinFet, as compared to a FinFet including fins that do not include a dielectric disposed within a furrow.

Abstract translation: 本文提供半导体器件和形成方法。 半导体器件包括具有沿着第一平面延伸的第一壁的鳍片，鳍片包括在第一平面的第一侧上限定第一沟槽的掺杂区域。 电介质设置在第一沟槽内，使得电介质与电介质的第一端和电介质的第二端之间的第一沟槽接触。 第一端与第一平面分开第一距离。 与包括不包括设置在沟槽内的电介质的翅片的FinFet相比，设置在沟槽内的电介质增加了相邻散热片的通道部分的隔离，从而减小了FinFet的漏电流。

公开(公告)号：US08999805B1

公开(公告)日：2015-04-07

申请号：US14046960

申请日：2013-10-05

Applicant: Taiwan Semiconductor Manufacturing Company Limited

Inventor： Jean-Pierre Colinge ,  Kuo-Cheng Ching ,  Ta-Pen Guo ,  Carlos H. Diaz

IPC: H01L21/331 ,  H01L21/8222 ,  H01L29/78 ,  H01L29/66

CPC classification number: H01L29/7827 ,  B82Y10/00 ,  H01L21/26586 ,  H01L21/76232 ,  H01L21/823878 ,  H01L21/823885 ,  H01L29/0676 ,  H01L29/401 ,  H01L29/413 ,  H01L29/42392 ,  H01L29/66439 ,  H01L29/66666 ,  H01L29/775

Abstract: A semiconductor device includes a first type region including a first conductivity type. The semiconductor device includes a second type region including a second conductivity type. The semiconductor device includes a channel region extending between the first type region and the second type region. The semiconductor device includes a gate region surrounding the channel region. The gate region includes a gate electrode. A gate electrode length of the gate electrode is less than about 10 nm. A method of forming a semiconductor device is provided.

Abstract translation: 半导体器件包括包括第一导电类型的第一类型区域。 半导体器件包括包括第二导电类型的第二类型区域。 半导体器件包括在第一类型区域和第二类型区域之间延伸的沟道区域。 半导体器件包括围绕沟道区的栅极区域。 栅极区域包括栅电极。 栅电极的栅电极长度小于约10nm。 提供一种形成半导体器件的方法。

公开(公告)号：US20150008489A1

公开(公告)日：2015-01-08

申请号：US13935797

申请日：2013-07-05

Applicant: Taiwan Semiconductor Manufacturing Company Limited

Inventor： Kuo-Cheng Ching ,  Chih-Hao Wang ,  Zhiqiang Wu ,  Carlos H. Diaz ,  Jean-Pierre Colinge

IPC: H01L29/66 ,  H01L29/78

CPC classification number: H01L29/66795 ,  H01L21/823431 ,  H01L21/823821 ,  H01L21/845 ,  H01L27/1211 ,  H01L29/1054 ,  H01L29/785

Abstract: A fin-type field effect transistor includes a first fin including a first source, a first drain, and a first channel. The fin-type field effect transistor includes a second fin including a second source, a second drain, and a second channel. The fin-type field effect transistor includes a first semiconductor region under the first fin and a second semiconductor region under the second fin. A first reacted region is adjacent the first semiconductor region while a second reacted region is adjacent the second semiconductor region. The first reacted region has a first dimension causing a first strain in the first channel. The second reacted region has a second dimension causing a second strain in the second channel. The first strain and second strain are substantially equal to one another. A method of fabricating an example fin-type field effect transistor is provided.

Abstract translation: 翅片型场效应晶体管包括：第一鳍片，包括第一源极，第一漏极和第一沟道。 鳍型场效应晶体管包括：第二鳍片，包括第二源极，第二漏极和第二沟道。 鳍式场效应晶体管包括第一鳍片下方的第一半导体区域和第二鳍片下方的第二半导体区域。 第一反应区域与第一半导体区域相邻，而第二反应区域与第二半导体区域相邻。 第一反应区域具有在第一通道中引起第一应变的第一尺寸。 第二反应区域具有在第二通道中引起第二应变的第二维度。 第一应变和第二应变彼此基本相等。 提供一种制造示例性鳍型场效应晶体管的方法。