公开(公告)号：US11973509B2

公开(公告)日：2024-04-30

申请号：US17709642

申请日：2022-03-31

Applicant: Silicon Laboratories Inc.

Inventor： Rangakrishnan Srinivasan ,  Zhongda Wang ,  Francesco Barale ,  Wenhuan Yu ,  Mustafa H. Koroglu ,  Yan Zhou ,  Terry L. Dickey

IPC: H03L7/107 ,  H03L7/099 ,  H04B1/40

CPC classification number: H03L7/1075 ,  H03L7/099 ,  H04B1/40

Abstract: A phase-locked loop (PLL) that provides a local oscillator signal for a radio. An oscillator of the PLL supplies an oscillator output signal. Control logic receives a request to change the oscillator output signal to a new frequency and responds to the request by setting a first capacitor circuit of the oscillator to a first capacitance that corresponds to a predetermined frequency of the oscillator output signal. The control logic also responds to the request by setting one or more other capacitor circuits of the oscillator according to temperature and according to a frequency difference between the predetermined frequency and the new frequency. After responding to the request by setting the first capacitor circuit and the one or more other capacitor circuits, the PLL locks to the new frequency using a signal from the PLL loop filter to adjust another capacitor circuit in the oscillator.

公开(公告)号：US11683012B2

公开(公告)日：2023-06-20

申请号：US17587678

申请日：2022-01-28

Applicant: Silicon Laboratories Inc.

Inventor： Luigi Panseri ,  Mustafa H. Koroglu ,  Praveen Vangala ,  John M. Khoury

IPC: H03F1/02 ,  H03F3/24 ,  H04B1/40 ,  H03F1/32

CPC classification number: H03F1/0216 ,  H03F1/3205 ,  H03F3/245 ,  H04B1/40 ,  H03F2200/451 ,  H03F2201/3215

Abstract: An apparatus includes a radio-frequency (RF) circuit, which includes a power amplifier coupled to receive an RF input signal and to provide an RF output signal in response to a modified bias signal. The RF circuit further includes a bias path circuit coupled to modify a bias signal as a function of a characteristic of an input signal to generate the modified bias signal. The bias path circuit provides the modified bias signal to the power amplifier.

公开(公告)号：US20220416829A1

公开(公告)日：2022-12-29

申请号：US17362148

申请日：2021-06-29

Applicant: Silicon Laboratories Inc.

Inventor： Mohamed M. Elkholy ,  Francesco Barale ,  Mustafa H. Koroglu

IPC: H04B1/18 ,  H04B1/04 ,  H03H7/38

Abstract: A wireless transceiver circuit with an impedance matching network within an integrated circuit is disclosed. In some embodiments, the impedance matching network utilizes an inductor, having two portions, disposed on two different metal layers of the integrated circuit. The first end of the first portion of the inductor is in communication with an antenna. The second end of the second portion is in communication with a low noise amplifier for receiving signals and a power amplifier for transmitting RF signals. The second end of the first portion is connected to the first end of the second portion using a via. In another embodiment, the two portions are disposed on the same metal layer, wherein one portion is disposed within the other with a gap separating the two portions. These configurations require less space than using two separate inductors and also have a low coupling coefficient.

公开(公告)号：US20220399869A1

公开(公告)日：2022-12-15

申请号：US17892492

申请日：2022-08-22

Applicant: Silicon Laboratories Inc.

Inventor： Vitor Pereira ,  Jeffrey A. Tindle ,  Mustafa H. Koroglu ,  Terry Lee Dickey

IPC: H03H7/01 ,  H04B1/18 ,  H04B1/04 ,  H04B1/40

Abstract: A wireless transceiver including a receiver circuit coupled to an RF transceiver node, a tunable notch filter coupled between the RF transceiver node and a reference node, and a controller that programs the tunable notch filter with a selected blocker frequency and that selectively enables the tunable notch filter to attenuate at least one blocker signal. The tunable notch filter may include a variable capacitor and an inductor coupled in series between the RF transceiver node and ground. The inductor of the tunable notch filter may include a bondwire coupled between a semiconductor die and a semiconductor package. The inductance may include a physical inductor mounted on the package or a printed circuit board. The tunable notch filter may be enabled by a switch selectively coupling the filter to either the RF transceiver node or ground. The variable capacitor may be digitally programmed with digital values stored in a memory.

公开(公告)号：US20220345170A1

公开(公告)日：2022-10-27

申请号：US17241202

申请日：2021-04-27

Applicant: Silicon Laboratories, Inc.

Inventor： Luigi Panseri ,  Yu Su ,  Mustafa H. Koroglu

IPC: H04B1/40 ,  H03F3/19

Abstract: A bias circuit for a low noise amplifier of a front end interface of a radio frequency communication device including a bias generator providing a bias voltage on a bias node for the low noise amplifier, a first resistive device coupled between the bias node and an input of the low noise amplifier, a first switch coupled in parallel with the first resistive device, and mode control circuitry receiving a mode signal indicative of a mode change, in which the mode control circuitry, in response to a mode change, momentarily activates the first switch to bypass the first resistive device and momentarily increases current capacity of the bias generator. The mode control circuitry may also momentarily activate a second switch to bypass a second resistive device of the bias circuit. The mode control circuitry may increase a sink current of the bias generator in response to the mode change.

公开(公告)号：US10826501B1

公开(公告)日：2020-11-03

申请号：US16450083

申请日：2019-06-24

Applicant: Silicon Laboratories Inc.

Inventor： Abdulkerim L. Coban ,  Wenhuan Yu ,  Mustafa H. Koroglu

IPC: H03L7/08 ,  H03K21/00 ,  H03K3/03 ,  H03L7/099 ,  H03H11/04 ,  H03H11/12

Abstract: A calibration operation adjusts a frequency of a ring oscillator to a desired frequency by adjusting programmable RC circuits in the stages of the ring oscillator. The programmable RC circuits have programmable capacitors, resistors, or both. The RC circuits account for most of the delay through the ring oscillator. Another circuit with its own RC time constant is calibrated based on the adjustments made to the RC circuits in the ring oscillator to achieve the desired frequency.

公开(公告)号：US10411583B2

公开(公告)日：2019-09-10

申请号：US15875583

申请日：2018-01-19

Applicant: Silicon Laboratories Inc.

Inventor： Sriharsha Vasadi ,  Mustafa H. Koroglu ,  Sherry X. Wu

IPC: H02M1/10 ,  H02M1/12 ,  H02J3/01 ,  H03F3/21 ,  H02M1/00

Abstract: In one form, a power amplifier system includes first and second amplification path, and a combination element. The first amplification path has an input for receiving a drive signal, and an output. The second amplification path has an input coupled to the input of the first amplification path, and an output. The second amplification path has a delay element that inserts a signal path delay with respect to the first amplification path, wherein the delay element has a delay corresponding to a harmonic that is desired to be reduced. The combination element is coupled to the output of the first amplification path and an output of the second amplification path, and provides an output signal as a sum of outputs of the first amplification path and the second amplification path.

公开(公告)号：US20190229608A1

公开(公告)日：2019-07-25

申请号：US15875583

申请日：2018-01-19

Applicant: Silicon Laboratories Inc.

Inventor： Sriharsha Vasadi ,  Mustafa H. Koroglu ,  Sherry X. Wu

IPC: H02M1/12 ,  H03F3/21 ,  H02J3/01

CPC classification number: H02M1/126 ,  H02J3/01 ,  H02M2001/0003 ,  H03F3/21

Abstract: In one form, a power amplifier system includes first and second amplification path, and a combination element. The first amplification path has an input for receiving a drive signal, and an output. The second amplification path has an input coupled to the input of the first amplification path, and an output. The second amplification path has a delay element that inserts a signal path delay with respect to the first amplification path, wherein the delay element has a delay corresponding to a harmonic that is desired to be reduced. The combination element is coupled to the output of the first amplification path and an output of the second amplification path, and provides an output signal as a sum of outputs of the first amplification path and the second amplification path.

公开(公告)号：US09479199B2

公开(公告)日：2016-10-25

申请号：US14930139

申请日：2015-11-02

Applicant: Silicon Laboratories Inc.

Inventor： Mustafa H. Koroglu ,  Yu Su

IPC: H04B1/18 ,  H04B1/00 ,  H03J3/10 ,  H04B1/16 ,  H03H7/01 ,  H03H7/46 ,  H03H11/12 ,  H03F3/19 ,  H03F1/56 ,  H03F3/193 ,  H03H7/09

CPC classification number: H04B1/005 ,  H03F1/565 ,  H03F3/19 ,  H03F3/193 ,  H03F2200/171 ,  H03F2200/294 ,  H03F2200/451 ,  H03H7/0169 ,  H03H7/09 ,  H03H7/46 ,  H03H11/1291 ,  H03H2210/025 ,  H03H2210/033 ,  H03J3/10 ,  H03J2200/32 ,  H04B1/16 ,  H04B1/1638 ,  H04B1/18

Abstract: A receiver includes a first amplifier having an input for receiving a radio frequency (RF) signal, and an output for providing an amplified RF signal, a switch section for selectively switching the RF signal onto one of a plurality of nodes, and a filter section comprising a plurality of filters coupled to respective ones of the plurality of nodes. A first filter of the plurality of filters comprises a first variable capacitor coupled in parallel with an inductance leg between a corresponding one of the plurality of nodes and a power supply voltage terminal, wherein the first variable capacitor has a capacitance that varies in response to a tuning signal, and the inductance leg comprises a first inductor in series with an effective resistance, wherein the effective resistance has a value related to an upper cutoff frequency to be tuned by the first filter.

Abstract translation: 接收机包括具有用于接收射频（RF）信号的输入端和用于提供放大的RF信号的输出的第一放大器，用于选择性地将RF信号切换到多个节点之一的开关部分，以及滤波器部分 包括耦合到所述多个节点中的相应节点的多个滤波器。 多个滤波器的第一滤波器包括与多个节点中的相应一个节点之间的电感支路并联耦合的第一可变电容器和电源电压端子，其中第一可变电容器具有响应于 调谐信号，并且电感腿包括与有效电阻串联的第一电感器，其中有效电阻具有与要由第一滤波器调谐的上截止频率相关的值。

公开(公告)号：US09231579B2

公开(公告)日：2016-01-05

申请号：US14074241

申请日：2013-11-07

Applicant: SILICON LABORATORIES INC.

Inventor： Ruifeng Sun ,  Mustafa H. Koroglu ,  Ramin Khoini Poorfard ,  Yu Su ,  Krishna Pentakota ,  Pio Balmelli

IPC: H03B1/00 ,  H03K3/00 ,  H03K17/16

CPC classification number: H03K17/16 ,  H03K2217/0063

Abstract: Techniques relating to buffer circuits. In one embodiment, a circuit includes a first transistor configured as a source follower and a feed-forward path coupled to the gate terminal of the first transistor and the drain terminal of the first transistor. In this embodiment, the feed-forward path includes circuitry configured to decouple the feed-forward path from a DC component of an input signal to the gate terminal of the first transistor. In this embodiment, the circuitry is configured to reduce a drain-source voltage of the first transistor based on the input signal. In some embodiment, the feed-forward path includes a second transistor configured as a source follower and the source terminal of the second transistor is coupled to the drain terminal of the first transistor. In various embodiments, reducing the drain-source voltage may improve linearity of the first transistor.

Abstract translation: 与缓冲电路有关的技术。 在一个实施例中，电路包括配置为源极跟随器的第一晶体管和耦合到第一晶体管的栅极端子和第一晶体管的漏极端子的前馈通路。 在该实施例中，前馈路径包括被配置为将前馈路径与输入信号的DC分量去耦到第一晶体管的栅极端子的电路。 在该实施例中，电路被配置为基于输入信号来减小第一晶体管的漏 - 源电压。 在一些实施例中，前馈路径包括配置为源极跟随器的第二晶体管，并且第二晶体管的源极端子耦合到第一晶体管的漏极端子。 在各种实施例中，减小漏极 - 源极电压可以提高第一晶体管的线性。