公开(公告)号：US09947557B2

公开(公告)日：2018-04-17

申请号：US14525716

申请日：2014-10-28

Applicant: Lam Research Corporation

Inventor： John Patrick Holland ,  Peter L. G. Ventzek ,  Harmeet Singh ,  Richard Gottscho

IPC: H01L21/67 ,  H01L21/3065 ,  H01J37/32

CPC classification number: H01L21/67069 ,  H01J37/32082 ,  H01J37/32633 ,  H01J37/32899 ,  H01L21/3065

Abstract: A semiconductor substrate processing system includes a chamber that includes a processing region and a substrate support. The system includes a top plate assembly disposed within the chamber above the substrate support. The top plate assembly includes first and second sets of plasma microchambers each formed into the lower surface of the top plate assembly. A first network of gas supply channels are formed through the top plate assembly to flow a first process gas to the first set of plasma microchambers to be transformed into a first plasma. A set of exhaust channels are formed through the top plate assembly. The second set of plasma microchambers are formed inside the set of exhaust channels. A second network of gas supply channels are formed through the top plate assembly to flow a second process gas to the second set of plasma microchambers to be transformed into a second plasma.

公开(公告)号：US20180033635A1

公开(公告)日：2018-02-01

申请号：US15719484

申请日：2017-09-28

Applicant: Lam Research Corporation

Inventor： Keren Jacobs Kanarik ,  Jeffrey Marks ,  Harmeet Singh ,  Samantha Tan ,  Alexander Kabansky ,  Wenbing Yang ,  Taeseung Kim ,  Dennis M. Hausmann ,  Thorsten Lill

IPC: H01L21/3065 ,  C23C16/455 ,  H01J37/32 ,  H01L21/67 ,  H01L21/311 ,  H01L21/02 ,  H01L21/683 ,  H01L43/12 ,  H01L21/3213

CPC classification number: H01L21/30655 ,  C23C16/402 ,  C23C16/45527 ,  C23C16/45536 ,  C23C16/45544 ,  C23C16/56 ,  H01J37/32009 ,  H01J37/32449 ,  H01J2237/334 ,  H01L21/02164 ,  H01L21/02274 ,  H01L21/0228 ,  H01L21/31116 ,  H01L21/32137 ,  H01L21/67069 ,  H01L21/67207 ,  H01L21/6831 ,  H01L43/12

Abstract: Methods are provided for integrating atomic layer etch and atomic layer deposition by performing both processes in the same chamber or reactor. Methods involve sequentially alternating between atomic layer etch and atomic layer deposition processes to prevent feature degradation during etch, improve selectivity, and encapsulate sensitive layers of a semiconductor substrate.

公开(公告)号：US20170363950A1

公开(公告)日：2017-12-21

申请号：US15188910

申请日：2016-06-21

Applicant: Lam Research Corporation

Inventor： Saravanapriyan Sriraman ,  Richard Wise ,  Harmeet Singh ,  Alex Paterson ,  Andrew D. Bailey, III ,  Vahid Vahedi ,  Richard A. Gottscho

IPC: G03F1/36 ,  G06F17/50 ,  G03F1/70

CPC classification number: G03F1/36 ,  G03F1/70 ,  G03F1/80 ,  G06F17/5081

Abstract: Disclosed are methods of generating a proximity-corrected design layout for photoresist to be used in an etch operation. The methods may include identifying a feature in an initial design layout, and estimating one or more quantities characteristic of an in-feature plasma flux (IFPF) within the feature during the etch operation. The methods may further include estimating a quantity characteristic of an edge placement error (EPE) of the feature by comparing the one or more quantities characteristic of the IFPF to those in a look-up table (LUT, and/or through application of a multivariate model trained on the LUT, e.g., constructed through machine learning methods (MLM)) which associates values of the quantity characteristic of EPE with values of the one or more quantities characteristics of the IFPF. Thereafter, the initial design layout may be modified based on at the determined quantity characteristic of EPE.

公开(公告)号：US09659783B2

公开(公告)日：2017-05-23

申请号：US14671601

申请日：2015-03-27

Applicant: Lam Research Corporation

Inventor： Joydeep Guha ,  Sirish K. Reddy ,  Kaushik Chattopadhyay ,  Thomas W. Mountsier ,  Aaron Eppler ,  Thorsten Lill ,  Vahid Vahedi ,  Harmeet Singh

IPC: H01L21/308 ,  H01L21/311 ,  H01L21/3213 ,  H01L21/306 ,  H01L27/11556

CPC classification number: H01L21/3081 ,  H01L21/30604 ,  H01L21/3086 ,  H01L21/31144 ,  H01L21/32139 ,  H01L27/11556

Abstract: A method for etching features in a stack is provided. A combination hardmask is formed by forming a first hardmask layer comprising carbon or silicon oxide over the stack, forming a second hardmask layer comprising metal over the first hardmask layer, and patterning the first and second hardmask layers. The stack is etched through the combination hardmask.

公开(公告)号：US20160379804A1

公开(公告)日：2016-12-29

申请号：US15261738

申请日：2016-09-09

Applicant: Lam Research Corporation

Inventor： Thorsten Lill ,  Harmeet Singh ,  Alex Paterson ,  Gowri Kamarthy

IPC: H01J37/32

CPC classification number: H01J37/32174 ,  H01J37/32082 ,  H01J37/321 ,  H01J37/32128 ,  H01J37/32146 ,  H01J37/32422 ,  H01J37/32706

Abstract: Systems and methods controlling ion energy within a plasma chamber are described. One of the systems includes an upper electrode coupled to a sinusoidal RF generator for receiving a sinusoidal signal and a nonsinusoidal RF generator for generating a nonsinusoidal signal. The system further includes a power amplifier coupled to the nonsinusoidal RF generator. The power amplifier is used for amplifying the nonsinusoidal signal to generate an amplified signal. The system includes a filter coupled to the power amplifier. The filter is used for filtering the amplified signal using a filtering signal to generate a filtered signal. The system includes a chuck coupled to the filter. The chuck faces at least a portion of the upper electrode and includes a lower electrode. The lower electrode is used for receiving the filtered signal to facilitate achieving ion energy at the chuck to be between a lower threshold and an upper threshold.

Abstract translation: 描述了控制等离子体室内离子能量的系统和方法。 系统中的一个包括耦合到正弦RF发生器的上电极，用于接收正弦信号，以及用于产生非正弦信号的非正弦RF发生器。 该系统还包括耦合到非正弦RF发生器的功率放大器。 功率放大器用于放大非正弦信号以产生放大信号。 该系统包括耦合到功率放大器的滤波器。 滤波器用于使用滤波信号对放大的信号进行滤波以产生滤波信号。 该系统包括联接到过滤器的卡盘。 卡盘面向上电极的至少一部分并且包括下电极。 下部电极用于接收滤波后的信号，以便于在卡盘处获得离子能量，处于较低阈值和较高阈值之间。

公开(公告)号：US09502221B2

公开(公告)日：2016-11-22

申请号：US14243705

申请日：2014-04-02

Applicant: Lam Research Corporation

Inventor： John C. Valcore, Jr. ,  Harmeet Singh ,  Henry Povolny

IPC: H01J7/24 ,  H01J31/26 ,  H01J37/32 ,  G05B19/418

CPC classification number: H01J37/32926 ,  G05B19/418 ,  H01J37/32183 ,  H01J37/32935 ,  H01J37/3299

Abstract: A method includes receiving a voltage and current measured at an output of an RF generator of a first plasma system and calculating a first model etch rate based on the voltage and current, and a power. The method further includes receiving a voltage and current measured at an output of the RF generator of a second plasma system, determining a second model etch rate based on the voltage and current at the output of the RF generator of the second plasma system, and comparing the second model etch rate with the first model etch rate. The method includes adjusting a power at the output of the RF generator of the second plasma system to achieve the first model etch rate associated with the first plasma system upon determining that the second model etch rate does not match the first model etch rate. The method is executed by a processor.

Abstract translation: 一种方法包括接收在第一等离子体系统的RF发生器的输出处测量的电压和电流，并且基于电压和电流以及功率来计算第一模型蚀刻速率。 该方法还包括接收在第二等离子体系统的RF发生器的输出处测量的电压和电流，基于第二等离子体系统的RF发生器的输出处的电压和电流确定第二模型蚀刻速率，以及比较 具有第一模型蚀刻速率的第二模型蚀刻速率。 该方法包括在确定第二模型蚀刻速率与第一模型蚀刻速率不匹配时，调整第二等离子体系统的RF发生器的输出端的功率以实现与第一等离子体系统相关联的第一模型蚀刻速率。 该方法由处理器执行。

公开(公告)号：US09460894B2

公开(公告)日：2016-10-04

申请号：US13930138

申请日：2013-06-28

Applicant: Lam Research Corporation

Inventor： Thorsten Lill ,  Harmeet Singh ,  Alex Paterson ,  Gowri Kamarthy

IPC: H01J37/32

CPC classification number: H01J37/32174 ,  H01J37/32082 ,  H01J37/321 ,  H01J37/32128 ,  H01J37/32146 ,  H01J37/32422 ,  H01J37/32706

Abstract: Systems and methods controlling ion energy within a plasma chamber are described. One of the systems includes an upper electrode coupled to a sinusoidal RF generator for receiving a sinusoidal signal and a nonsinusoidal RF generator for generating a nonsinusoidal signal. The system further includes a power amplifier coupled to the nonsinusoidal RF generator. The power amplifier is used for amplifying the nonsinusoidal signal to generate an amplified signal. The system includes a filter coupled to the power amplifier. The filter is used for filtering the amplified signal using a filtering signal to generate a filtered signal. The system includes a chuck coupled to the filter. The chuck faces at least a portion of the upper electrode and includes a lower electrode. The lower electrode is used for receiving the filtered signal to facilitate achieving ion energy at the chuck to be between a lower threshold and an upper threshold.

Abstract translation: 描述了控制等离子体室内离子能量的系统和方法。 系统中的一个包括耦合到正弦RF发生器的上电极，用于接收正弦信号，以及用于产生非正弦信号的非正弦RF发生器。 该系统还包括耦合到非正弦RF发生器的功率放大器。 功率放大器用于放大非正弦信号以产生放大信号。 该系统包括耦合到功率放大器的滤波器。 滤波器用于使用滤波信号对放大的信号进行滤波以产生滤波信号。 该系统包括联接到过滤器的卡盘。 卡盘面向上电极的至少一部分并且包括下电极。 下部电极用于接收滤波后的信号，以便于在卡盘处获得离子能量，处于较低阈值和较高阈值之间。

公开(公告)号：US20160276137A1

公开(公告)日：2016-09-22

申请号：US15172004

申请日：2016-06-02

Applicant: Lam Research Corporation

Inventor： John C. Valcore, JR. ,  Harmeet Singh ,  Bradford J. Lyndaker

IPC: H01J37/32 ,  H03K3/01 ,  H03L7/06

CPC classification number: H01J37/32146 ,  H01J37/32082 ,  H01J37/32174 ,  H01J37/32183 ,  H01J37/3244 ,  H01J37/3255 ,  H01J2237/327 ,  H03K3/01 ,  H03L7/00 ,  H03L7/06 ,  H05H2001/4682

Abstract: A method for achieving sub-pulsing during a state is described. The method includes receiving a clock signal from a clock source, the clock signal having two states and generating a pulsed signal from the clock signal. The pulsed signal has sub-states within one of the states. The sub-states alternate with respect to each other at a frequency greater than a frequency of the states. The method includes providing the pulsed signal to control power of a radio frequency (RF) signal that is generated by an RF generator. The power is controlled to be synchronous with the pulsed signal.

公开(公告)号：US20160211156A1

公开(公告)日：2016-07-21

申请号：US14996656

申请日：2016-01-15

Applicant: Lam Research Corporation

Inventor： Harmeet Singh ,  Alex Paterson

IPC: H01L21/67 ,  H01J37/32 ,  H01L21/3065 ,  H01L21/3213 ,  H01L21/311

CPC classification number: H01L21/67213 ,  H01J37/32 ,  H01J37/32422 ,  H01J37/3244 ,  H01J37/32458 ,  H01J37/32623 ,  H01J2237/327 ,  H01J2237/3341 ,  H01L21/02057 ,  H01L21/3065 ,  H01L21/31116 ,  H01L21/32136 ,  H01L21/67069 ,  H01L43/12

Abstract: The disclosed embodiments relate to methods and apparatus for removing material from a substrate. In various implementations, conductive material is removed from a sidewall of a previously etched feature such as a trench, hole or pillar on a semiconductor substrate. In practicing the techniques herein, a substrate is provided in a reaction chamber that is divided into an upper plasma generation chamber and a lower processing chamber by a corrugated ion extractor plate with apertures therethrough. The extractor plate is corrugated such that the plasma sheath follows the shape of the extractor plate, such that ions enter the lower processing chamber at an angle relative to the substrate. As such, during processing, ions are able to penetrate into previously etched features and strike the substrate on the sidewalls of such features. Through this mechanism, the material on the sidewalls of the features may be removed.

公开(公告)号：US09330927B2

公开(公告)日：2016-05-03

申请号：US14012802

申请日：2013-08-28

Applicant: Lam Research Corporation

Inventor： Rajinder Dhindsa ,  Harmeet Singh ,  Sang Ki Nam

IPC: H01L21/3065 ,  H01J37/32

CPC classification number: H01L21/67069 ,  H01J37/32091 ,  H01J37/32449 ,  H01J37/32816 ,  H01L21/3065

Abstract: A plasma processing system and method includes a processing chamber, and a plasma processing volume included therein. The plasma processing volume having a volume less than the processing chamber. The plasma processing volume being defined by a top electrode, a substrate support surface opposing the surface of the top electrode and a plasma confinement structure including at least one outlet port. A conductance control structure is movably disposed proximate to the at least one outlet port and capable of restricting an outlet flow through the at least one outlet port to a first flow rate and capable of increasing the outlet flow through the at least one outlet port to a second flow rate, wherein the conductance control structure restricts the outlet flow rate moves between the first flow rate and the second flow rate corresponding to a selected processing state set by the controller during a plasma process.

Abstract translation: 等离子体处理系统和方法包括处理室和其中包括的等离子体处理体积。 等离子体处理体积的体积小于处理室。 等离子体处理体积由顶部电极，与顶部电极的表面相对的衬底支撑表面和包括至少一个出口的等离子体限制结构限定。 电导控制结构可移动地设置在靠近所述至少一个出口端口并且能够限制通过所述至少一个出口端口的出口流到第一流量并且能够将通过所述至少一个出口端口的出口流增加到 第二流量，其中电导控制结构限制出口流量在等离子体处理期间由与控制器设定的选定处理状态对应的第一流量与第二流量之间移动。