公开(公告)号：US09484360B2

公开(公告)日：2016-11-01

申请号：US14435110

申请日：2014-08-29

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Wei Qin ,  Xiang Liu ,  Heecheol Kim

IPC: H01L27/12 ,  H01L29/66 ,  H01L29/786 ,  H01L29/24 ,  G02F1/1368

CPC classification number: H01L27/1214 ,  G02F1/1368 ,  H01L27/1259 ,  H01L27/1262 ,  H01L27/127 ,  H01L27/1288 ,  H01L29/24 ,  H01L29/66969 ,  H01L29/7869

Abstract: The present disclosure provides a method for manufacturing an oxide thin film transistor (TFT) array substrate. Specifically the step of forming the thin film transistors may include: forming a pattern of an oxide semiconductor layer on the substrate with photoresist is reserved on the channel regions in the pattern of the oxide semiconductor layer; and forming a source-drain metal layer on the pattern of the oxide semiconductor layer, forming patterns that include source electrodes and drain electrodes by an etching process, and removing the photoresist reserved on the channel regions in the pattern of the oxide semiconductor layer.

Abstract translation: 本发明提供一种制造氧化物薄膜晶体管（TFT）阵列基板的方法。 具体地，形成薄膜晶体管的步骤可以包括：在氧化物半导体层的图案的沟道区域上保留用光致抗蚀剂在衬底上形成氧化物半导体层的图案; 并且在氧化物半导体层的图案上形成源极 - 漏极金属层，通过蚀刻工艺形成包括源电极和漏电极的图案，并且去除在氧化物半导体层的图案中保留在沟道区上的光致抗蚀剂。

公开(公告)号：US20160254296A1

公开(公告)日：2016-09-01

申请号：US14241345

申请日：2013-11-08

Applicant: BOE Technology Group Co., Ltd.

Inventor： Xiang Liu ,  Gang Wang ,  Jianshe Xue

IPC: H01L27/12 ,  H01L29/49 ,  H01L29/45 ,  G02F1/1362 ,  H01L29/423 ,  H01L29/786 ,  G02F1/1343 ,  H01L21/027 ,  H01L21/4763

CPC classification number: H01L27/1288 ,  G02F1/13439 ,  G02F1/136286 ,  G02F2001/136295 ,  H01L21/0274 ,  H01L21/47635 ,  H01L27/1225 ,  H01L27/124 ,  H01L29/42356 ,  H01L29/42384 ,  H01L29/45 ,  H01L29/4908 ,  H01L29/495 ,  H01L29/66765 ,  H01L29/7869

Abstract: The present invention provides a method for manufacturing an array substrate comprising: sequentially forming an adhesion enhancement layer, a copper-bearing metal layer and a photoresist layer on a substrate, and respectively forming a reserved region and a removal region by performing exposure and development on the photoresist layer using a mask plate, simultaneously processing the adhesion enhancement layer, the copper-bearing metal layer and the photoresist layer in the removal region by a single wet etching process, to form an adhesion enhancement intermediate layer corresponding to the adhesion enhancement layer, a copper-bearing metal intermediate layer corresponding to the copper-bearing metal layer and the photoresist layer thereon in the reserved region; simultaneously processing the adhesion enhancement intermediate layer, the copper-bearing metal intermediate layer and the photoresist layer by a dry etching process, then stripping off the photoresist layer, to form a patterned adhesion enhancement layer and a patterned copper-bearing metal layer respectively.

Abstract translation: 本发明提供一种阵列基板的制造方法，包括：在基板上依次形成粘合增强层，含铜金属层和光致抗蚀剂层，分别通过曝光和显影来形成保留区域和去除区域 使用掩模板的光致抗蚀剂层，通过单次湿法蚀刻工艺同时处理去除区域中的粘附增强层，含铜金属层和光致抗蚀剂层，以形成对应于粘合增强层的粘附增强中间层， 对应于所述保留区域中的含铜金属层和其上的光致抗蚀剂层的含铜金属中间层; 通过干法蚀刻工艺同时处理粘合增强中间层，含铜金属中间层和光致抗蚀剂层，然后剥离光致抗蚀剂层，分别形成图案化的附着增强层和图案化的含铜金属层。

公开(公告)号：US09349760B2

公开(公告)日：2016-05-24

申请号：US14638478

申请日：2015-03-04

Applicant: BOE TECHNOLOGY GROUP CO., LTD. ,  BEIJING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.

Inventor： Xiang Liu ,  Zhenyu Xie ,  Xu Chen

IPC: G02F1/1362 ,  H01L29/49 ,  H01L27/12 ,  H01L29/66 ,  H01L29/786 ,  G02F1/1368 ,  H01L21/027 ,  H01L21/311

CPC classification number: H01L27/1288 ,  G02F1/136286 ,  G02F1/1368 ,  G02F2001/136236 ,  G02F2001/136295 ,  H01L21/0271 ,  H01L21/31111 ,  H01L21/31133 ,  H01L27/1214 ,  H01L29/4908 ,  H01L29/66765 ,  H01L29/78618

Abstract: A thin film transistor liquid crystal display (TFT-LCD) array substrate comprises a gate line, a data line, a pixel electrode and a thin film transistor. The pixel electrode and the thin film transistor are formed in a pixel region defined by intersecting of the gate line and the data line, and the thin film transistor comprises a gate electrode, a semiconductor layer, a source electrode and a drain electrode. Two separate parts of the surface of the semiconductor layer are treated by a surface treatment to form into an ohmic contact layer, and the source electrode and the drain electrode are connected with the semiconductor layer through the ohmic contact layer in the two separate parts, respectively.

Abstract translation: 薄膜晶体管液晶显示器（TFT-LCD）阵列基板包括栅极线，数据线，像素电极和薄膜晶体管。 像素电极和薄膜晶体管形成在由栅极线和数据线相交所定义的像素区域中，薄膜晶体管包括栅电极，半导体层，源电极和漏电极。 半导体层的表面的两个分开的部分通过表面处理来形成欧姆接触层，并且源电极和漏极分别通过两个分开的部分中的欧姆接触层与半导体层连接 。

公开(公告)号：US09305942B2

公开(公告)日：2016-04-05

申请号：US13703499

申请日：2012-09-21

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Xiang Liu ,  Jianshe Xue

IPC: G02F1/1362 ,  H01L27/112 ,  H01L29/417 ,  H01L21/02 ,  H01L29/66 ,  H01L27/12 ,  H01L21/04 ,  H01L21/48 ,  H01L27/115 ,  H01L29/45 ,  H01L21/44 ,  H01L27/15

CPC classification number: H01L27/124 ,  G02F1/1362 ,  G02F1/136286 ,  G02F2001/136218 ,  G02F2001/136236 ,  H01L21/44 ,  H01L21/4885 ,  H01L27/1259 ,  H01L27/1288 ,  H01L27/156 ,  H01L29/41733 ,  H01L29/458 ,  H01L29/66765

Abstract: Embodiments of the present invention provide a TFT array substrate and a method for manufacturing the same and a display device. The TFT array substrate comprises: a base substrate; gate lines, gate electrodes, a gate insulating layer and a semiconductor active layer formed on the base substrate; a metal barrier layer formed on the semiconductor active layer, the metal barrier layer covering the semiconductor active layer; source electrodes and drain electrodes formed on the metal barrier layer, with a metal oxide part being formed between the source electrode and the drain electrode to insulate the source electrode and the drain electrode from each other; and a protection layer formed on the gate insulating layer and the source and drain electrodes, wherein the metal oxide part is formed by oxidizing a part of the metal barrier layer located between the source electrode and the drain electrode.

Abstract translation: 本发明的实施例提供一种TFT阵列基板及其制造方法以及显示装置。 TFT阵列基板包括：基底基板; 栅极线，栅电极，栅绝缘层和形成在基底基板上的半导体有源层; 形成在所述半导体有源层上的金属阻挡层，所述金属阻挡层覆盖所述半导体有源层; 源电极和漏电极，形成在金属阻挡层上，金属氧化物部分形成在源电极和漏电极之间，以使源电极和漏极彼此绝缘; 以及形成在所述栅极绝缘层和所述源极和漏极上的保护层，其中所述金属氧化物部分通过氧化位于所述源电极和所述漏极之间的所述金属阻挡层的一部分而形成。

公开(公告)号：US09202892B2

公开(公告)日：2015-12-01

申请号：US13980202

申请日：2012-12-10

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Xiang Liu ,  Jianshe Xue

IPC: H01L29/66 ,  H01L29/786 ,  H01L27/12

CPC classification number: H01L29/66742 ,  H01L27/1225 ,  H01L27/1288 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/66969 ,  H01L29/7869 ,  H01L29/78693 ,  H01L2029/42388

Abstract: A manufacturing method of a TFT array substrate is provided. The method includes the following steps: respectively forming a metal oxide semiconductor layer, an etching barrier layer, a source electrode, a data line, a drain electrode, a pixel electrode, a gate insulating layer, a contact hole, a gate electrode and a gate scanning line on a substrate by patterning processes, wherein the metal oxide semiconductor layer and the etching barrier layer are formed by a same patterning process, and the source electrode, the drain electrode, the pixel electrode and the data line are formed by another same patterning process.

Abstract translation: 提供了TFT阵列基板的制造方法。 该方法包括以下步骤：分别形成金属氧化物半导体层，蚀刻阻挡层，源极，数据线，漏电极，像素电极，栅极绝缘层，接触孔，栅电极和 通过图案化工艺在衬底上的栅极扫描线，其中通过相同的图案化工艺形成金属氧化物半导体层和蚀刻阻挡层，并且源电极，漏电极，像素电极和数据线由另一个形成 图案化过程。

公开(公告)号：US20150179809A1

公开(公告)日：2015-06-25

申请号：US14352182

申请日：2013-07-02

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Xiang Liu ,  Gang Wang ,  Jianshe Xue

IPC: H01L29/786 ,  H01L21/441 ,  H01L29/45 ,  H01L27/12 ,  H01L29/66 ,  H01L29/49

CPC classification number: H01L29/78606 ,  H01L21/441 ,  H01L27/1225 ,  H01L27/1259 ,  H01L29/45 ,  H01L29/4908 ,  H01L29/66969 ,  H01L29/78618 ,  H01L29/7869 ,  H01L29/78693

Abstract: A thin film transistor and method for manufacturing the same, an array substrate and a display device are disclosed. The thin film transistor comprises a substrate; a gate electrode, a source electrode, a drain electrode and a semiconductor layer formed on the substrate; a gate insulating layer between the gate electrode and the semiconductor layer or between the gate electrode and the source and drain electrodes; an etching stop layer between the semiconductor layer and the source and drain electrodes having a source contact hole and a drain contact hole therein; and a source buffer layer between the source electrode and the semiconductor layer and a drain buffer layer between the drain electrode and the semiconductor layer. The source and drain electrodes are metal Cu electrodes, and the source and drain buffer layers are Cu alloy layer. The formation of the source and drain buffer layer improves the adhesion of the source and drain electrodes thereon to the semiconductor layer therebeneath, and thus improves the performance of the TFT and image quality.

Abstract translation: 公开了一种薄膜晶体管及其制造方法，阵列基板和显示装置。 薄膜晶体管包括基板; 栅电极，源电极，漏电极和形成在基板上的半导体层; 栅电极和半导体层之间或栅电极与源电极和漏电极之间的栅极绝缘层; 半导体层与源漏漏电极之间的蚀刻停止层，其中具有源极接触孔和漏极接触孔; 以及源极和半导体层之间的源极缓冲层以及漏极和半导体层之间的漏极缓冲层。 源极和漏极是金属Cu电极，源极和漏极缓冲层是Cu合金层。 源极和漏极缓冲层的形成提高了源极和漏极电极到其上的半导体层的粘附性，从而提高了TFT的性能和图像质量。

公开(公告)号：US08912538B2

公开(公告)日：2014-12-16

申请号：US13822480

申请日：2012-12-17

Applicant: Boe Technology Group Co., Ltd.

Inventor： Xiang Liu ,  Woobong Lee

IPC: H01L29/10 ,  H01L29/12 ,  H01L29/04 ,  H01L31/036 ,  H01L31/0376 ,  H01L31/20 ,  H01L29/15 ,  H01L21/00 ,  H01L21/84 ,  G02F1/1368 ,  H01L29/786 ,  H01L27/12

CPC classification number: H01L27/127 ,  G02F1/1368 ,  H01L27/1225 ,  H01L29/78618 ,  H01L29/78693

Abstract: Embodiments of the present invention provide a thin film transistor array substrate, a method for manufacturing the same, a display panel and a display device. The method for manufacturing the thin film transistor array substrate comprises: sequentially depositing a first metal oxide layer, a second metal oxide layer and a source and drain metal layer, conductivity of the first metal oxide layer being smaller than conductivity of the second metal oxide layer; patterning the first metal oxide layer, the second metal oxide layer and the source and drain metal layer, so as to form an active layer, a buffer layer, a source electrode and a drain electrode, respectively. According to technical solutions of the embodiments of the invention, it is possible that the manufacturing process of the metal oxide TFT array substrate is simplified, and the production cost of products is reduced.

Abstract translation: 本发明的实施例提供一种薄膜晶体管阵列基板，其制造方法，显示面板和显示装置。 制造薄膜晶体管阵列基板的方法包括：依次沉积第一金属氧化物层，第二金属氧化物层和源极和漏极金属层，第一金属氧化物层的导电性小于第二金属氧化物层的导电率 ; 图案化第一金属氧化物层，第二金属氧化物层和源极和漏极金属层，以分别形成有源层，缓冲层，源电极和漏电极。 根据本发明的实施方式的技术方案，可以简化金属氧化物TFT阵列基板的制造工序，降低产品的生产成本。

公开(公告)号：US20140154823A1

公开(公告)日：2014-06-05

申请号：US13704156

申请日：2012-11-14

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Xiang Liu ,  Jianshe Xue

IPC: H01L27/12

CPC classification number: H01L27/1288 ,  H01L27/1225 ,  H01L29/7869

Abstract: Embodiments of the invention provide a manufacturing method of a TFT array substrate. The TFT array substrate is formed to comprise a plurality of scanning lines, a plurality of data lines and a plurality of pixel units defined by intersecting these scanning lines and these data lines with each other. Each of the pixel units comprises a TFT and a pixel electrode. The TFT is formed to comprise a gate electrode, a gate insulating layer, a metal oxide semiconductor layer used as an active layer, an etch stopping layer formed on a portion of the surface of the metal oxide semiconductor layer, a source electrode and a drain electrode. In this method, the metal oxide semiconductor layer, the source electrode and the drain electrode are formed by a same patterning process.

Abstract translation: 本发明的实施例提供一种TFT阵列基板的制造方法。 TFT阵列基板形成为包括多条扫描线，多条数据线和通过将这些扫描线和这些数据线相交而定义的多个像素单元。 每个像素单元包括TFT和像素电极。 TFT形成为包括栅电极，栅极绝缘层，用作有源层的金属氧化物半导体层，形成在金属氧化物半导体层的表面的一部分上的蚀刻停止层，源电极和漏极 电极。 在该方法中，金属氧化物半导体层，源电极和漏电极通过相同的图案化工艺形成。