公开(公告)号：US11972732B2

公开(公告)日：2024-04-30

申请号：US17658631

申请日：2022-04-08

申请人： CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD. ,  BOE TECHNOLOGY GROUP CO., LTD.

发明人： Heecheol Kim ,  Teng Chen ,  Shuo Li

IPC分类号： G09G3/3258 ,  G09G3/3291 ,  G11C19/28

CPC分类号： G09G3/3258 ,  G09G3/3291 ,  G11C19/28 ,  G09G2310/0286

摘要： A shift register unit, configured to generate a first gate drive signal and a second gate drive signal, which includes a first control circuit, configured to control a potential of a first node; a second control circuit, configured to control a potential of a second node; a first output circuit, configured to generate the first gate drive signal based on a first voltage signal provided by a first voltage terminal under the control of the potentials of the first and second nodes, and output the first gate drive signal through a first gate drive signal output terminal, wherein the first voltage signal provided by the first voltage terminal is a high level signal; and a second output circuit, configured to generate a second gate drive signal based on a second voltage signal provided by a second voltage terminal under the control of a potential of a control node, and output the second gate drive signal through a second gate drive signal output terminal.

公开(公告)号：US10998068B2

公开(公告)日：2021-05-04

申请号：US16623669

申请日：2019-03-22

申请人： CHONGQING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD. ,  BOE TECHNOLOGY GROUP CO., LTD.

发明人： Zhuo Xu ,  Yuanbo Zhang ,  Yajie Bai ,  Haipeng Zhu ,  Yan Zhou ,  Hailong Wu ,  Heecheol Kim ,  Min Ran

IPC分类号： G11C19/28 ,  G09G3/20 ,  G09G3/3208 ,  G09G3/36

摘要： A shift register circuit includes a first circuit, M second circuits, and N third circuits. M and N are both positive integers, N is an integer multiple of M, M is greater than or equal to 2, and a quotient of N and M is greater than or equal to 2. The first circuit includes a first signal output terminal. Each second circuit includes a second signal input terminal connected to the first signal output terminal. Each third circuit includes a third signal input terminal that is connected to one of second signal input terminals of the M second circuits. A second signal output terminal of each second circuit is connected to third signal input terminals of N/M third circuits, and different second signal output terminals are connected to different third signal input terminals.

公开(公告)号：US10164217B2

公开(公告)日：2018-12-25

申请号：US14418007

申请日：2014-03-31

申请人： BOE TECHNOLOGY GROUP CO., LTD.

发明人： Seongyeol Yoo ,  Seungjin Choi ,  Heecheol Kim ,  Youngsuk Song

IPC分类号： H01L51/56 ,  H01L27/32 ,  H01L51/52 ,  H01L29/786 ,  H01L21/77 ,  H01L29/417

摘要： An array substrate, a manufacturing method thereof and a display device are provided. The array substrate comprises a base substrate (1), an organic light-emitting diode (OLED) device and a thin-film transistor (TFT) structure, the OLED device disposed on one side of the base substrate (1); the TFT structure disposed on the other side of the base substrate (1); a through hole formed on the base substrate and provided with a conductive bridge (2); and the OLED device connected with the TFT structure through the conductive bridge (2). The array substrate can avoid electrical interference of the TFT structure on the OLED device, and hence accurate drive for the OLED device can be achieved; as the OLED device can be directly formed on a surface of the base substrate, surface treatment of a pixel electrode is saved with respect to conventional OLED display device, and hence manufacturing process can be accelerated and manufacturing cost can be reduced; and as both an anode and a cathode of the OLED device are made from transparent materials, double-sided light emission can be achieved in the array substrate, and hence double-sided display can be achieved in the array substrate.

公开(公告)号：US09923085B2

公开(公告)日：2018-03-20

申请号：US14785397

申请日：2015-01-30

申请人： Boe Technology Group Co., Ltd.

发明人： Seongyeol Yoo ,  Youngsuk Song ,  Heecheol Kim ,  Seungjin Choi

IPC分类号： H01L21/38 ,  H01L29/786 ,  H01L21/336 ,  H01L29/66 ,  H01L29/24 ,  H01L29/221 ,  H01L21/441 ,  H01L21/82 ,  H01L21/477 ,  H01L27/12

CPC分类号： H01L29/66969 ,  H01L21/44 ,  H01L21/477 ,  H01L21/82 ,  H01L27/1225 ,  H01L27/1259 ,  H01L29/45 ,  H01L29/458 ,  H01L29/66757 ,  H01L29/66765 ,  H01L29/786 ,  H01L29/78618 ,  H01L29/78666 ,  H01L29/78669 ,  H01L29/7869

摘要： The present invention relates to a method for manufacturing a thin film transistor and an array substrate, and corresponding devices. In the thin film transistor manufacturing process, the base substrate is annealed after the formation of the patterns of the active layer, the source and the drain in the thin film transistor, so as to thermally diffuse ions of the source and the drain at an ohmic contact between the active layer and the source, as well as the drain, to the active layer, and further to provide the active layer with ions of the source and the drain for changing the components of the active layer, which reduces the resistance at the ohmic contact between the active layer and the source, as well as the drain, and guarantees the uniformity and reliability of the thin film transistor. Moreover, annealing treatment is relatively simpler in implementation as compared with the plasma treatment, and will not increase the complexity of the method for manufacturing the entire thin film transistor, which is good for thin film transistor production efficiency.

公开(公告)号：US09893090B2

公开(公告)日：2018-02-13

申请号：US14424717

申请日：2014-05-23

申请人： BOE Technology Group Co., Ltd.

发明人： Heecheol Kim ,  Youngsuk Song ,  Seongyeol Yoo ,  Seungjin Choi

IPC分类号： G02F1/1362 ,  H01L27/12 ,  G02F1/1333 ,  G02F1/1343 ,  G02F1/1368 ,  H01L29/66 ,  H01L29/786

CPC分类号： H01L27/124 ,  G02F1/133345 ,  G02F1/13439 ,  G02F1/136227 ,  G02F1/136286 ,  G02F1/1368 ,  G02F2001/136295 ,  H01L27/1222 ,  H01L27/1259 ,  H01L29/66765 ,  H01L29/66969 ,  H01L29/78669 ,  H01L29/78678 ,  H01L29/7869

摘要： An array substrate and a fabrication method thereof, and a display device are provided. The array substrate comprises a gate line and a data line intersecting with each other. The data line and the gate line are formed in a same layer on a substrate, the data line is disconnected in a region of the gate line. A connection pattern is formed in the region of the gate line, the connection pattern is insulated from the gate line, and ends of the data line located on both sides of the gate line are electrically connected by the connection pattern.

公开(公告)号：US09823410B2

公开(公告)日：2017-11-21

申请号：US14361058

申请日：2013-06-14

申请人： BOE TECHNOLOGY GROUP CO., LTD.

发明人： Heecheol Kim ,  Yan Wei ,  Chao Xu ,  Chunfang Zhang

IPC分类号： F21V7/04 ,  F21V8/00 ,  B29D11/00

CPC分类号： G02B6/0055 ,  B29D11/00663 ,  G02B6/0053 ,  G02B6/0065 ,  G02B6/0068

摘要： A method of manufacturing a light guiding plate comprises steps of forming a protrusion array composed of a plurality of protrusions (300) on a surface of a substrate (100); and forming reflective layers (301) on side facets of the protrusions (300) respectively, in such a way that, the farther away from a side of the substrate (100) the protrusion (300) with the reflective layer is, the greater the reflectivity of the reflective layer (301) is. The light emitted from the light guiding plate made by the method is relatively uniform, and the heating issue is also avoided.

公开(公告)号：US09659971B2

公开(公告)日：2017-05-23

申请号：US14342154

申请日：2013-11-12

申请人： BOE Technology Group Co., Ltd.

发明人： Kuanjun Peng ,  Yunyun Tian ,  Hyunsic Choi ,  Heecheol Kim

IPC分类号： G02F1/1337 ,  G02F1/1335 ,  H01L27/12 ,  G02F1/1368 ,  G02F1/1343 ,  G02F1/1333 ,  G02F1/1362

CPC分类号： H01L27/124 ,  G02F1/133345 ,  G02F1/134363 ,  G02F1/13439 ,  G02F1/136286 ,  G02F1/1368 ,  G02F2001/134372 ,  G02F2201/40

摘要： The present invention relates to the field of liquid crystal display technology and provides an array substrate and a liquid crystal display device which can solve the problem of low transmissivity of existing liquid crystal display devices. The array substrate of the present invention comprises a plurality of pixel units, each pixel unit is provided with a plate electrode and a slit electrode arranged above the plate electrode, an insulation layer is provided between the plate electrode and the slit electrode, and the plate electrode extends to the periphery region of the pixel unit, the slit electrode extends to the periphery region of the pixel unit; the slit electrode and the plate electrode are both provided in at least part of the peripheral region of the pixel unit. the present invention is applicable to liquid crystal display devices, especially the liquid crystal display devices taking a “dual gate lines” design.

公开(公告)号：US09524685B2

公开(公告)日：2016-12-20

申请号：US14316284

申请日：2014-06-26

申请人： BOE TECHNOLOGY GROUP CO., LTD.

发明人： Heecheol Kim ,  Song Young Suk ,  Yoo Seong Yeol ,  Im Yun Sik ,  Choi Seung Jin

IPC分类号： G09G5/00 ,  G09G3/36 ,  G09G3/20

CPC分类号： G09G3/3618 ,  G09G3/20 ,  G09G3/2085 ,  G09G3/3688 ,  G09G2300/0426 ,  G09G2310/0297

摘要： The present invention relates to a display apparatus and a method for driving the same. The display apparatus comprises: a source driving circuit having at least one output; at least one pixel unit each including a plurality of sub-pixels, the respective sub-pixels in each pixel unit being connected to the same output of the source driving circuit by data lines, wherein a switch group is disposed in a data line connecting each sub-pixel with the output of the source driving circuit, each switch group including at least two switches parallel with each other; wherein the source driving circuit charges each pixel unit based on the on-off states of the respective switches between the source driving circuit and each pixel unit through a plurality of charging phases, wherein for one switch group corresponding to one of the sub-pixels in each pixel unit, each switch in the one switch group is respectively switched on in different charging phases to perform at least two times of charge on the one of the sub-pixels in at least two charging phases. The display apparatus and the method for driving the same can increase charging time for each sub-pixel, thus avoiding a bad display due to insufficient charge of the sub-pixels.

摘要翻译： 显示装置及其驱动方法技术领域本发明涉及一种显示装置及其驱动方法。 显示装置包括：具有至少一个输出的源极驱动电路; 每个像素单元包括多个子像素的至少一个像素单元，每个像素单元中的各个子像素通过数据线连接到源极驱动电路的相同输出，其中开关组设置在连接各个子像素的数据线中 子像素与源极驱动电路的输出，每个开关组包括彼此平行的至少两个开关; 其中源驱动电路通过多个充电阶段基于源极驱动电路和每个像素单元之间的各个开关的导通截止状态来对每个像素单元进行充电，其中对于与其中一个子像素对应的一个开关组， 每个像素单元，一个开关组中的每个开关分别以不同的充电阶段接通，以在至少两个充电阶段中的一个子像素上执行至少两次充电。 显示装置及其驱动方法可以增加每个子像素的充电时间，从而避免由于子像素的充电不充分而导致的不良显示。

公开(公告)号：US20160343835A1

公开(公告)日：2016-11-24

申请号：US14785397

申请日：2015-01-30

申请人： BOE TECHNOLOGY GROUP CO., LTD.

发明人： Seongyeol Yoo ,  Youngsuk Song ,  Heecheol Kim ,  Seungjin Choi

IPC分类号： H01L29/66 ,  H01L27/12 ,  H01L29/786 ,  H01L21/477

CPC分类号： H01L29/66969 ,  H01L21/44 ,  H01L21/477 ,  H01L21/82 ,  H01L27/1225 ,  H01L27/1259 ,  H01L29/45 ,  H01L29/458 ,  H01L29/66757 ,  H01L29/66765 ,  H01L29/786 ,  H01L29/78618 ,  H01L29/78666 ,  H01L29/78669 ,  H01L29/7869

摘要： The present invention relates to a method for manufacturing a thin film transistor and an array substrate, and corresponding devices. In the thin film transistor manufacturing process, the base substrate is annealed after the formation of the patterns of the active layer, the source and the drain in the thin film transistor, so as to thermally diffuse ions of the source and the drain at an ohmic contact between the active layer and the source, as well as the drain, to the active layer, and further to provide the active layer with ions of the source and the drain for changing the components of the active layer, which reduces the resistance at the ohmic contact between the active layer and the source, as well as the drain, and guarantees the uniformity and reliability of the thin film transistor. Moreover, annealing treatment is relatively simpler in implementation as compared with the plasma treatment, and will not increase the complexity of the method for manufacturing the entire thin film transistor, which is good for thin film transistor production efficiency.

摘要翻译： 本发明涉及薄膜晶体管和阵列基板的制造方法及其对应装置。 在薄膜晶体管制造工艺中，在形成薄膜晶体管中的有源层，源极和漏极的图案之后，对基底基板进行退火，以将源极和漏极的离子以欧姆 有源层和源极之间的接触以及漏极到有源层，并且还提供有源层与源极和漏极的离子，用于改变有源层的分量，这降低了在 有源层和源极之间的欧姆接触以及漏极，并保证了薄膜晶体管的均匀性和可靠性。 此外，与等离子体处理相比，退火处理相对简单，并且不会增加制造整个薄膜晶体管的方法的复杂性，这对于薄膜晶体管的生产效率是有利的。

公开(公告)号：US09461073B2

公开(公告)日：2016-10-04

申请号：US14429870

申请日：2014-06-05

申请人： BOE TECHNOLOGY GROUP CO., LTD.

发明人： Zhiqiang Xu ,  Heecheol Kim ,  Chao Xu

IPC分类号： H01L27/12 ,  G02F1/1368 ,  G02F1/1337 ,  G02F1/1343

CPC分类号： H01L27/124 ,  G02F1/133707 ,  G02F1/134363 ,  G02F1/1368 ,  G02F2001/134372 ,  H01L27/12 ,  H01L27/1259

摘要： The embodiments of the invention provide an array substrate, a method for manufacturing the same and a display device, relate to the field of display technology, and can reduce the color cast phenomenon of the display device, and improve the display effect. The array substrate comprises a plurality of pixel units which are arranged in an array, each of the pixel units comprises a plurality of sub-pixel units, the width of each of the sub-pixel units is equal, each of the sub-pixel units corresponds to one first electrode, the first electrode comprises a plurality of strip-shaped structures which are arranged at an equal interval, and intervals of the strip-shaped structures of the first electrodes corresponding to different sub-pixel units in each of the pixel units are not completely equal; any of the sub-pixel units meets Q·W+(Q−1)D

摘要翻译： 本发明的实施例提供阵列基板，其制造方法和显示装置，涉及显示技术领域，并且可以减少显示装置的着色现象​​，并提高显示效果。 阵列基板包括以阵列布置的多个像素单元，每个像素单元包括多个子像素单元，每个子像素单元的宽度相等，每个子像素单元 对应于一个第一电极，第一电极包括以等间隔布置的多个条形结构，并且第一电极的条形结构的间隔对应于每个像素单元中的不同子像素单元 不完全平等 任何子像素单元满足Q·W +（Q-1）D