公开(公告)号：US10950717B2

公开(公告)日：2021-03-16

申请号：US16171644

申请日：2018-10-26

申请人： FUJI ELECTRIC CO., LTD.

发明人： Masaki Tamura ,  Hitoshi Abe ,  Takeshi Fujii

IPC分类号： H01L29/739 ,  H01L29/10 ,  H01L29/08 ,  H01L27/07 ,  H01L29/417 ,  H01L29/861 ,  H01L21/263 ,  H01L29/868 ,  H01L29/66 ,  H01L29/36 ,  H01L29/32 ,  H01L29/06 ,  H01L29/16 ,  H01L29/20 ,  H01L29/24

摘要： In a surface layer of a rear surface of the semiconductor substrate, an n+-type cathode region and a p-type cathode region are each selectively provided. The n+-type cathode region and the p-type cathode region constitute a cathode layer and are adjacent to each other along a direction parallel to the rear surface of the semiconductor substrate. The n+-type cathode region and the p-type cathode region are in contact with a cathode electrode. In an n−-type drift layer, plural n-type FS layers are provided at differing depths deeper from the rear surface of the semiconductor substrate than is the cathode layer. With such configuration, in a diode, a tradeoff relationship of forward voltage reduction and reverse recovery loss reduction may be improved and soft recovery may be realized.

公开(公告)号：US20210066130A1

公开(公告)日：2021-03-04

申请号：US16802670

申请日：2020-02-27

申请人： KABUSHIKI KAISHA TOSHIBA ,  TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION

发明人： Shinji NUNOTANI ,  Shinji ONZUKA

IPC分类号： H01L21/784 ,  H01L21/283 ,  H01L21/268 ,  H01L21/306 ,  H01L21/304 ,  H01L21/3065 ,  H01L29/417 ,  H01L29/868 ,  H01L29/872 ,  H01L21/265 ,  H01L29/45 ,  H01L29/78 ,  H01L29/739 ,  H01L21/683

摘要： A semiconductor device includes a semiconductor part, first and second electrodes. The semiconductor part is provided between the first and second electrodes. A method of manufacturing the device includes forming the first electrode covering a back surface of a wafer after the second electrode is formed on a front surface of the wafer; forming a first groove by selectively removing the first electrode; and dividing the wafer by forming a second groove at the front surface side. The wafer includes a region to be the semiconductor part; and the first and second grooves are provided along a periphery of the region. The first groove is in communication with the first groove. The second groove has a width in a direction along the front surface of the wafer, the width of the first groove being narrower than a width of the first groove in the same direction.

公开(公告)号：US10930747B2

公开(公告)日：2021-02-23

申请号：US16431056

申请日：2019-06-04

申请人： NXP B.V.

发明人： Tony Vanhoucke ,  Mahmoud Shehab Mohammad Al-Sa'di

IPC分类号： H01L29/06 ,  H01L29/417 ,  H01L29/868

摘要： An embodiment of a semiconductor device includes a first semiconductor region formed within a semiconductor substrate, a second semiconductor region formed within the semiconductor substrate, a first electrode coupled to the first semiconductor region, a second electrode coupled to the second semiconductor region and proximate the first electrode, wherein the second electrode is encircled by the first electrode. A third electrode may be coupled to the first electrode and the second semiconductor region. A fourth electrode may be coupled to the first semiconductor region and proximate the third electrode, wherein the fourth electrode may be coupled to the second electrode, and wherein the third electrode includes a shared portion of the first electrode.

公开(公告)号：US10930705B2

公开(公告)日：2021-02-23

申请号：US15938625

申请日：2018-03-28

申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION

发明人： Fabio Carta ,  Chung H. Lam ,  Matthew J. BrightSky ,  Bahman Hekmatshoartabari

IPC分类号： H01L27/24 ,  H01L45/00 ,  H01L21/02 ,  H01L29/16 ,  H01L29/861 ,  H01L29/868 ,  H01L29/66 ,  H01L29/04

摘要： A method is presented for integrating an electronic component in back end of the line (BEOL) processing. The method includes forming a first electrode over a semiconductor substrate, forming a first electrically conductive material over a portion of the first electrode, forming a second electrically conductive material over the first electrically conductive material, where the first and second electrically conductive materials define a p-n junction, depositing a phase change material over the p-n junction, and forming a second electrode over the phase change material.

公开(公告)号：US20210050458A1

公开(公告)日：2021-02-18

申请号：US16667631

申请日：2019-10-29

申请人： SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

发明人： Mingjiao LIU

IPC分类号： H01L29/868 ,  H01L29/47 ,  H01L29/66

摘要： A device includes a first doped semiconductor region and a second oppositely doped semiconductor region that are separated by an undoped or lightly-doped semiconductor drift region. The device further includes a first electrode structure making an ohmic contact with the first doped semiconductor region, and a second electrode structure making a universal contact with the second doped semiconductor region. The universal contact of the second electrode structure allows flow of both electrons and holes into, and out of, the device.

公开(公告)号：US10916644B2

公开(公告)日：2021-02-09

申请号：US16241106

申请日：2019-01-07

申请人： Kabushiki Kaisha Toshiba ,  Toshiba Electronic Devices & Storage Corporation

发明人： Keiko Kawamura ,  Tsuneo Ogura

IPC分类号： H01L29/739 ,  H01L29/10 ,  H01L29/868 ,  H01L29/417

摘要： A semiconductor device includes a first electrode, a second electrode disposed at a position opposing the first electrode, and a semiconductor body provided between the first electrode and the second electrode. The semiconductor body includes a first semiconductor layer of a first conductivity type, a second semiconductor layer of a second conductivity type and a third semiconductor layer of the second conductivity type; the second semiconductor layer is provided between the first semiconductor layer and the first electrode; and the third semiconductor layer is selectively provided inside the first semiconductor layer and disposed at a position separated from the second semiconductor layer. The first electrode is electrically connected to the second semiconductor layer and includes an extension portion; and the extension portion pierces the second semiconductor layer, extends in a first direction toward the second electrode, and is connected to the third semiconductor layer.

公开(公告)号：US10825935B2

公开(公告)日：2020-11-03

申请号：US16096717

申请日：2017-04-20

申请人： TAMURA CORPORATION ,  National Institute of Information and Communications Technology

发明人： Kohei Sasaki ,  Masataka Higashiwaki

IPC分类号： H01L29/872 ,  H01L29/47 ,  H01L29/868 ,  H01L29/861 ,  H01L29/24 ,  H01L29/36

摘要： A trench MOS-type Schottky diode includes a first semiconductor layer including a Ga2O3-based single crystal, a second semiconductor layer that is a layer laminated on the first semiconductor layer and that includes a Ga2O3-based single crystal and a trench opened on a surface thereof opposite to the first semiconductor layer, an anode electrode formed on the surface of the second semiconductor layer opposite to the first semiconductor layer, a cathode electrode formed on a surface of the first semiconductor layer opposite to the second semiconductor layer, an insulating film covering the inner surface of the trench of the second semiconductor layer, and a trench MOS gate that is embedded in the trench of the second semiconductor layer so as to be covered with the insulating film and is in contact with the anode electrode.

公开(公告)号：US20200335490A1

公开(公告)日：2020-10-22

申请号：US16894364

申请日：2020-06-05

申请人： FUJI ELECTRIC CO., LTD.

发明人： Yoshiaki TOYODA ,  Hideaki KATAKURA

IPC分类号： H01L27/02 ,  H01L29/861 ,  H01L29/06 ,  H01L29/78 ,  H01L21/8238 ,  H01L27/092 ,  H01L29/868 ,  H01L29/423

摘要： In a method of manufacturing a semiconductor device, selectively forming a first semiconductor region and a fourth semiconductor region to be away from each other in a surface layer of a first principal surface of a semiconductor substrate at a same impurity implantation and impurity diffusion process, selectively forming a second semiconductor region in the first semiconductor region and selectively forming a fifth semiconductor region in the fourth semiconductor region at a same impurity implantation and impurity diffusion process, and selectively forming a third semiconductor region that penetrates the first semiconductor region in a depth direction and selectively forming a sixth semiconductor region that penetrates the fourth semiconductor region in the depth direction at a same impurity implantation and impurity diffusion process.

公开(公告)号：US10811500B2

公开(公告)日：2020-10-20

申请号：US16482505

申请日：2017-12-01

申请人： Sumitomo Electric Industries, Ltd.

发明人： Hironori Itoh ,  Keiji Wada ,  Tsutomu Hori

IPC分类号： H01L29/16 ,  H01L21/02 ,  H01L21/306 ,  H01L29/04 ,  H01L29/34 ,  H01L29/66 ,  H01L29/739 ,  H01L29/744 ,  H01L29/78 ,  H01L29/868 ,  H01L29/872

摘要： It is assumed that a defect satisfying relations of Formula 1 and Formula 2 is a first defect, where an off angle is θ. It is assumed that a defect having an elongated shape when viewed in a direction perpendicular to the second main surface, and satisfying relations of Formula 3 and Formula 4 is a second defect. A value obtained by dividing the number of the second defect by the sum of the number of the first defect and the number of the second defect is greater than 0.5.

公开(公告)号：US20200312966A1

公开(公告)日：2020-10-01

申请号：US16814554

申请日：2020-03-10

申请人： FUJI ELECTRIC CO., LTD.

发明人： Takeshi TAWARA

IPC分类号： H01L29/36 ,  H01L29/16 ,  H01L29/868 ,  H01L29/78 ,  H01L21/04 ,  H01L29/66

摘要： A silicon carbide epitaxial substrate including a silicon carbide semiconductor substrate of a first conductivity type, a first semiconductor layer of the first conductivity type, and a high-density foreign element region. The first semiconductor layer is provided at a front surface of the silicon carbide semiconductor substrate and has an impurity concentration lower than that of the silicon carbide semiconductor substrate. The high-density foreign element region is provided in the silicon carbide semiconductor substrate at a predetermined depth from the front surface thereof. The high-density foreign element region contains an element other than carbon and silicon, at a density higher than that of the silicon carbide semiconductor substrate.