公开(公告)号：US20030141860A1

公开(公告)日：2003-07-31

申请号：US10248537

申请日：2003-01-28

发明人： MING-REN CHI ,  PENG-CHIA KUO

IPC分类号： G01R001/00

CPC分类号： G01R31/2868 ,  G01R31/2834

摘要： An automatic integrated circuit testing system, device and method using an integrative computer. The system includes a machine frame having at least one testing computer for holding and testing the integrated circuit. The machine frame also has at least one automatic plugging/unplugging machine for engaging the integrated circuits with the computer system and removing the integrated circuits after testing has been completed. The machine frame further includes at least one controller device electrically connected to the testing computer and the automatic plugging/unplugging machine for controlling the movements of the automatic plugging/unplugging machine and the testing computer. The testing computer and the integrated circuit together form an integrative computer system capable of executing various general application programs and special testing programs for integrative testing and analysis.

摘要翻译： 一种使用综合计算机的自动集成电路测试系统，装置和方法。 该系统包括具有用于保持和测试集成电路的至少一个测试计算机的机架。 机架还具有至少一个用于将集成电路与计算机系统接合的自动插拔/拔出机器，并且在测试完成之后移除集成电路。 机架还包括电连接到测试计算机的至少一个控制器设备和用于控制自动插拔/拔出机器和测试计算机的移动的自动插拔/拔出机器。 测试计算机和集成电路一起形成一个能够执行各种一般应用程序和特殊测试程序的综合计算机系统，用于集成测试和分析。

公开(公告)号：US20030137317A1

公开(公告)日：2003-07-24

申请号：US10336931

申请日：2003-01-06

申请人： Samsung Electronics Co., Ltd.

发明人： Yoon-Min Kim ,  Ki-Yeul Kim

IPC分类号： G01R031/26

CPC分类号： G01R31/2868 ,  G01R1/0483

摘要： A test system for an integrated circuit chip, protects a circuit board from frost during low temperature testing. The test system comprises sealing means capable of removably attaching to a second surface of the test circuit board and for sealing a portion of the second surface to isolate the portion of the second surface of the test circuit board from ambient air. In this manner, the sealing unit prevents generation of frost at the solder junction portion of the test circuit, which would otherwise lead to leakage failures during test.

摘要翻译： 用于集成电路芯片的测试系统，可在低温测试期间保护电路板免受霜冻。 测试系统包括能够可移除地附接到测试电路板的第二表面并且用于密封第二表面的一部分以将测试电路板的第二表面的部分与环境空气隔离的密封装置。 以这种方式，密封单元防止在测试电路的焊接部分产生霜，否则这将在测试期间导致泄漏故障。

公开(公告)号：US20020005729A1

公开(公告)日：2002-01-17

申请号：US09946552

申请日：2001-09-06

申请人： Elm Technology Corporation.

发明人： Glenn Leedy

IPC分类号： G01R031/02

CPC分类号： G01R31/2867 ,  G01R1/07307 ,  G01R1/07314 ,  G01R31/2806 ,  G01R31/2831 ,  G01R31/2868 ,  G01R31/2874 ,  G01R31/2886 ,  G01R31/318505 ,  G01R31/318511 ,  G01R31/31905 ,  G01R31/31912 ,  G02F1/13452 ,  G03F7/70466 ,  G03F7/70658 ,  G11C29/006 ,  H01L21/67138 ,  H01L21/67706 ,  H01L21/67721 ,  H01L21/762 ,  H01L21/76264 ,  H01L21/76289 ,  H01L21/764 ,  H01L22/22 ,  H01L23/498 ,  H01L23/538 ,  H01L23/5381 ,  H01L23/5383 ,  H01L23/5386 ,  H01L23/5387 ,  H01L24/75 ,  H01L24/81 ,  H01L25/0652 ,  H01L25/0655 ,  H01L25/50 ,  H01L2224/75 ,  H01L2224/7565 ,  H01L2224/81801 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01023 ,  H01L2924/01033 ,  H01L2924/01038 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01082 ,  H01L2924/10329 ,  H01L2924/12042 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15192 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/3011 ,  H01L2924/00

摘要： A single gas tight system which performs multi-functions including reducing the thickness of oxides on contact pads and probing, testing, burn-in, repairing, programming and binning of integrated circuits. A system according to one embodiment of the present invention includes: (a) a gas tight chamber having (1) a plurality of modules each having a holding fixture, a wafer, a probing device, an electronic circuit board, and a temperature control device, (2) a gas source for supplying non-oxidizing gases such as nitrogen and hydrogen into the chamber, (3) a handler for moving the wafers and the probing devices, and (b) a computer coupled to the chamber for controlling and communicating with the handler, the temperature control devices, the holding fixtures and the probing devices. A holding fixture holds a wafer having integrated circuits and aligns the wafer to a probing device. An integrated circuit has a plurality of conductive contact portions that are able to be connected to probe points of the probing device. A temperature control device is used to heat the wafer during an oxide reduction process or during burn-in of the wafer. During the oxide reduction process, hydrogen is introduced into the chamber, and the wafer is heated so that the oxides on the contact pads can combine with hydrogen to form water vapor, thus reducing the thickness of the oxides. The computer analyzes the test and/or burn-in data and provides control signals for repairing or programming the integrated circuits. The computer system also generates a database that contains the performance data of all the integrated circuits on the wafer that are tested and allows for immediate feedback of the quality of the integrated circuits.

摘要翻译： 单个气密系统，其执行多功能，包括减小接触垫上的氧化物的厚度以及集成电路的探测，测试，老化，修复，编程和分组。 根据本发明的一个实施例的系统包括：（a）气密室，其具有（1）多个模块，每个模块具有保持夹具，晶片，探测装置，电子电路板和温度控制装置 ，（2）用于向室供应非氧化性气体例如氮气和氢气的气源，（3）用于移动晶片和探测装置的处理器，以及（b）耦合到室的计算机，用于控制和通信 处理器，温度控制装置，夹具和探测装置。 保持夹具保持具有集成电路的晶片，并将晶片对准探测装置。 集成电路具有能够连接到探测装置的探针点的多个导电接触部分。 温度控制装置用于在氧化物还原过程期间或在晶片的老化期间加热晶片。 在氧化还原过程中，将氢气引入室中，并且加热晶片，使得接触焊盘上的氧化物可以与氢气结合形成水蒸气，从而减小氧化物的厚度。 计算机分析测试和/或老化数据，并提供用于修复或编程集成电路的控制信号。 计算机系统还生成包含被测试的晶片上所有集成电路的性能数据的数据库，并允许对集成电路的质量的即时反馈。

公开(公告)号：US06257319B1

公开(公告)日：2001-07-10

申请号：US09357906

申请日：1999-07-21

申请人： Tadashi Kainuma ,  Noboru Masuda ,  Haruki Nakajima ,  Noriyuki Igarashi ,  Yuichi Nansai

发明人： Tadashi Kainuma ,  Noboru Masuda ,  Haruki Nakajima ,  Noriyuki Igarashi ,  Yuichi Nansai

IPC分类号： G01R3102

CPC分类号： G01R31/2868 ,  G01R31/2849 ,  G01R31/2874

摘要： An IC testing apparatus 1 for performing a test by applying at least a low temperature stress to ICs to be tested comprising a refrigerant cycle 210 wherein at least a compressor 211, condenser 212, expansion valve 214 and evaporator 215 are connected in this order, and a cold air applying line 220 having a blower 223 for supplying heat exchanged cold air by the evaporator 215 to the ICs to be tested.

摘要翻译： 用于通过对要测试的IC至少应用低温应力进行测试的IC测试装置1包括至少压缩机211，冷凝器212，膨胀阀214和蒸发器215依次连接的制冷剂循环210，以及 具有用于通过蒸发器215将热交换的冷空气供给到要测试的IC的鼓风机223的冷空气施加管线220。

公开(公告)号：US06189120B1

公开(公告)日：2001-02-13

申请号：US09515975

申请日：2000-02-29

申请人： Salman Akram

发明人： Salman Akram

IPC分类号： G01R3128

CPC分类号： G01R31/2868 ,  G01R31/2862 ,  G01R31/2879 ,  G01R31/3025

摘要： A burn-in testing system for evaluating a circuit under test, the system including a burn-in board having a plurality of receptacles, at least one of which being sized to receive the circuit under test, test interface circuitry supported by the board and coupled to the receptacles, the test interface circuitry including a transmitter and receiver; power conductors supported by the board, coupled to the receptacles and configured to be connected to a power supply to power the circuit under test during burn-in testing, control and data signal conductors, a burn-in oven having a compartment selectively receiving the burn-in board and being configured to apply heat within the compartment, and an interrogator unit supported by the burn-in oven, the interrogator unit being configured to send commands to the test interface circuitry to exercise the circuit under test optically or via radio communication and to receive responses to the commands optically or via radio communication. A method for testing an integrated circuit having operational circuitry formed thereon, optically and via radio frequency.

摘要翻译： 一种用于评估被测电路的老化测试系统，所述系统包括具有多个插座的老化板，其中至少其中之一的尺寸适于接收被测电路，测试接口电路由板支持并耦合 所述测试接口电路包括发射机和接收机; 由板支撑的电源导体，耦合到插座并且被配置为连接到电源，以在老化测试，控制和数据信号导体期间对被测电路供电，具有选择性地接收烧伤的隔室的老化炉 并且被配置为在隔间内施加热量，以及由老化炉支撑的询问器单元，所述询问器单元被配置为向测试接口电路发送命令以光学地或通过无线电通信来锻炼被测电路，并且 通过光学或通过无线电通信来接收对命令的响应。 一种在光学上和经由无线电频率测试其上形成有操作电路的集成电路的方法。

公开(公告)号：US6111421A

公开(公告)日：2000-08-29

申请号：US168382

申请日：1998-10-08

申请人： Shigeaki Takahashi ,  Yukihiko Fukasawa

发明人： Shigeaki Takahashi ,  Yukihiko Fukasawa

IPC分类号： G01R31/28 ,  G01R31/02

CPC分类号： G01R31/2868 ,  G01R31/2887 ,  G01R31/2867 ,  G01R31/2874 ,  G01R31/2891

摘要： A probe method is disclosed which inspects the electrical characteristics of an object to be inspected (wafer W) by bringing the electrodes of the object to be inspected placed on a main chuck and probes of a probe card into contact with each other. The main chuck is movable in the X, Y, Z, and .theta. directions and heated to a predetermined inspection temperature. The main chuck retreats to a position separated from the inspection position during high-temperature inspection. The time (retreat time) during which the main chuck stays retreated is calculated by a retreat time calculating mechanism. A preheat execute determination mechanism determines whether the probe card and probes are to be preheated on the basis of the retreat time. When it is determined that preheating is necessary, a preheat time calculation mechanism calculates the preheat execute time. Preheating is executed during the preheat execute time determined by a preheat end determination mechanism, and misalignment of the probes is corrected.

摘要翻译： 公开了一种探针方法，其通过将被检查物体的电极放置在主卡盘和探针卡片的探针上而彼此接触来检查被检查物体（晶片W）的电特性。 主夹头可在X，Y，Z和θ方向上移动并加热到预定的检查温度。 在高温检查期间，主卡盘退回到与检查位置分离的位置。 通过撤退时间计算机制计算主卡盘停留时间（撤退时间）。 预热执行确定机构基于撤回时间来确定探针卡和探针是否被预热。 当确定需要预热时，预热时间计算机构计算预热执行时间。 在由预热端确定机构确定的预热执行时间期间执行预热，并且校正探针的未对准。

公开(公告)号：US5431491A

公开(公告)日：1995-07-11

申请号：US135147

申请日：1993-10-12

申请人： Hans L. Melgaard ,  Louis A. Larson ,  Wendell Schafer

发明人： Hans L. Melgaard ,  Louis A. Larson ,  Wendell Schafer

IPC分类号： G01R31/28 ,  A47B81/00

CPC分类号： G01R31/2868 ,  G01R31/2867

摘要： A method and apparatus for automatically inserting and ejecting electrical connectors of electronic component test trays from electrical connectors in a panel of an environmental test chamber, e.g. an oven, at the beginning and end of a test period to facilitate loading and unloading the test trays. The electronic components are inserted into test trays so that electrical connections are made with test tray conductors which terminate at a test tray connector. The trays are loaded into the oven in an insertion cycle by manually sliding them onto lateral tray supports with the tray connector ends aligned with mating electrical connectors in the panel of the test oven. The insertion cycle of a track guided, carriage mounted, inserter/ejector mechanism is commenced wherein the mechanism is advanced from tray to tray to sequentially insert the tray connectors into the panel mounted connectors until all trays are inserted. The oven door is closed and the test is conducted. Upon completion of the test, the door is opened and the ejection cycle of the mechanism is initiated to sequentially eject the tray connectors from the panel mounted connectors until all trays are ejected. During insertion and ejection of each tray, the mechanism rotates one or more pivot arms about pivots to apply their free ends against the trays to move the trays on the lateral tray supports a constant distance to ensure reliable connection or removal of the tray from the panel mounted connectors. As the mechanism carriage traverses the ends of the trays a tray position trip sensor detects any out of position trays. The mechanism decreases operator fatigue and errors due to improperly seated connectors.

摘要翻译： 一种用于从环境试验箱的面板中的电连接器自动插入和弹出电子部件测试盘的电连接器的方法和装置，例如， 一个烤箱，在测试期间的开始和结束，以方便装载和卸载测试托盘。 将电子部件插入测试托盘中，以便使用终止于测试托盘连接器的测试托盘导体进行电气连接。 托盘在插入循环中通过手动将它们滑动到侧面托盘支架上而装载到烤箱中，托盘连接器端与测试烘箱的面板中的匹配电连接器对准。 轨道引导，滑架安装，插入器/推出器机构的插入循环开始，其中机构从托盘前进到托盘，以将托盘连接器顺序地插入面板安装的连接器中，直到所有托盘被插入。 烤箱门关闭并进行测试。 完成测试后，打开门并启动机构的弹出循环，以便从面板安装的连接器顺序地弹出托盘连接器，直到所有托盘都被弹出。 在每个托盘的插入和弹出期间，机构围绕枢轴旋转一个或多个枢转臂以将它们的自由端部抵靠托盘移动，以使托盘支撑件在恒定的距离上移动，以确保托盘与面板的可靠连接或移除 安装连接器。 当机构托架穿过托盘的端部时，托盘位置跳闸传感器检测任何位置托盘。 该机构减少了操作员的疲劳和错误，因为连接器安装不正确。

公开(公告)号：US5084671A

公开(公告)日：1992-01-28

申请号：US512105

申请日：1990-04-20

申请人： Eiji Miyata ,  Masahiko Sugiyama ,  Masahiko Kohno ,  Masataka Hatta

发明人： Eiji Miyata ,  Masahiko Sugiyama ,  Masahiko Kohno ,  Masataka Hatta

IPC分类号： F25B21/04 ,  G01R1/073 ,  G01R31/28

CPC分类号： G01R31/2868 ,  G01R1/07314 ,  G01R31/2875 ,  F25B21/04

摘要： An electric probing-test machine comprises a probe card having a plurality of probes contacted with chips of a semiconductor wafer and serving to apply test signal to a tester which judges whether circuits on the chips of the wafer are correct or deficient, a main chuck for holding the wafer at a test temperature, a system for cooling the main chuck, and a controller for controlling the cooling system. The main chuck includes a chuck top contacted directly with the wafer, a jacket arranged to conduct heat exchange relative to the chuck top, and a temperature sensor for detecting the temperature of the chuck top. The cooling system has a pump for supplying a coolant from a reservoir to the jacket. Responsive to temperature information detected by the temperature sensor, the amount of the coolant supplied from the reservoir to the jacket is controlled by the controller to thereby control the temperature of the chuck top.

摘要翻译： 电探测机包括探针卡，其具有与半导体晶片的芯片接触的多个探头，用于向测试器施加测试信号，该测试器判断晶片的芯片上的电路是否正确或不足，主夹头 将晶片保持在测试温度，用于冷却主卡盘的系统以及用于控制冷却系统的控制器。 主夹具包括与晶片直接接触的卡盘顶板，布置成相对于卡盘顶部进行热交换的夹套和用于检测卡盘顶部的温度的温度传感器。 冷却系统具有用于将冷却剂从储存器供给到外壳的泵。 响应于由温度传感器检测到的温度信息，通过控制器控制从贮存器供给到护套的冷却剂的量，从而控制卡盘顶部的温度。

公开(公告)号：US4954774A

公开(公告)日：1990-09-04

申请号：US366106

申请日：1989-06-13

申请人： Michel Binet

发明人： Michel Binet

IPC分类号： G01R31/26 ,  G01R31/28 ,  H01L21/66

CPC分类号： G01R31/2868 ,  G01R31/2862 ,  G01R31/2875

摘要： A system of automatic control of integrated circuits, in which a wafer of integrated circuits (10) to be tested is supported by a sample carrier (61) and is electrically connected to a probe card (60). This system includes (a) a water-tight chamber (20) traversed by a flow or dry inert gas under excess pressure; (b) a mechanical assembly (40) of platforms (41, 42, 43, 44) for controlling the displacements of the wafer to be tested, with interpolation of a thermally insulated wedge (46) between the assembly of platforms and the sample carrier (61); and (c) a device (80) for cooling the sample carrier (61) internal of the system and including a container (81) of cooling liquid, a tube being prolonged in the cooling liquid to conduct the latter to a cooling cavity (63) internal of the sample carrier, and a device (64, 65) for exhausting the gaseous liquid appearing in the cooling cavity.

摘要翻译： 一种集成电路的自动控制系统，其中待测试的集成电路（10）的晶片由样品载体（61）支撑并电连接到探针卡（60）。 该系统包括（a）在过压下由流动或干燥惰性气体穿过的不透水室（20）; （b）用于控制待测试的晶片的位移的平台（41,42,43,44）的机械组件（40），其中在平台组件和样品载体之间插入绝热楔（46） （61）; 和（c）用于冷却系统内部的样品载体（61）的装置（80），并且包括冷却液体容器（81），在冷却液中延长管以将其导入冷却腔（63 ）和用于排出出现在冷却腔中的气态液体的装置（64,65）。

公开(公告)号：US4791364A

公开(公告)日：1988-12-13

申请号：US144606

申请日：1988-01-11

申请人： James C. Kufis ,  Robert S. Semken

发明人： James C. Kufis ,  Robert S. Semken

IPC分类号： G01R31/28 ,  G01R31/02

CPC分类号： G01R31/2868 ,  G01R31/2867

摘要： A device for individually testing semiconductor integrated circuits in wafer form at elevated and/or reduced temperatures include a fixture body for connection to a conventional probing device. The fixture body has an open-ended aperture to permit visual inspection of a circuit being tested, a plenum to receive pressurized gas at a selected temperature(s), and nozzles to direct the gas from the plenum into the aperture for ejection onto the surface of the integrated circuit being tested to rapidly bring that circuit to the temperature of the gas.

摘要翻译： 用于在升高和/或降低的温度下单独测试晶片形式的半导体集成电路的装置包括用于连接到常规探测装置的固定体。 夹具主体具有开口孔径，以允许目视检查正被测试的电路，用于接收选定温度下的加压气体的气室，以及用于将气体从气室引导到孔中以喷射到表面上的喷嘴 被测试的集成电路快速将该电路带到气体的温度。