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公开(公告)号:US20080029867A1
公开(公告)日:2008-02-07
申请号:US11462588
申请日:2006-08-04
申请人: Young Cheol Kim , Koo Hong Lee , Jae Hak Yee , Il Kwon Shim
发明人: Young Cheol Kim , Koo Hong Lee , Jae Hak Yee , Il Kwon Shim
IPC分类号: H01L23/02
CPC分类号: H01L23/49537 , H01L21/6835 , H01L23/3107 , H01L23/3135 , H01L23/49548 , H01L23/49575 , H01L24/48 , H01L25/105 , H01L2224/32145 , H01L2224/45014 , H01L2224/48091 , H01L2224/48247 , H01L2224/48465 , H01L2224/73215 , H01L2225/1029 , H01L2225/1052 , H01L2924/00014 , H01L2924/01046 , H01L2924/01078 , H01L2924/01079 , H01L2924/14 , H01L2924/181 , H01L2924/18165 , H01L2924/3025 , H01L2924/3511 , H01L2924/00 , H01L2924/00012 , H01L2224/45015 , H01L2924/207
摘要: A stackable multi-chip package system is provided including forming an external interconnect having a base and a tip, connecting a first integrated circuit die and the base, stacking a second integrated circuit die over the first integrated circuit die in an active side to active side configuration, connecting the second integrated circuit die and the base, and molding the first integrated circuit die, the second integrated circuit die, and the external interconnect partially exposed.
摘要翻译: 提供了一种可堆叠的多芯片封装系统,包括形成具有基极和尖端的外部互连件,连接第一集成电路管芯和基座,将第二集成电路管芯在有源侧的第一集成电路管芯上堆叠到有源侧 配置,连接第二集成电路管芯和基座,以及模制第一集成电路管芯,第二集成电路管芯和部分暴露的外部互连。
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公开(公告)号:US20070225143A1
公开(公告)日:2007-09-27
申请号:US11617917
申请日:2006-12-29
申请人: Young Cheol KIM , An Sung LEE , Byung Ok KIM
发明人: Young Cheol KIM , An Sung LEE , Byung Ok KIM
IPC分类号: B04B9/14
CPC分类号: B04B9/14 , B04B5/0421 , F16F15/363 , Y10T74/2109
摘要: Disclosed herein are a balancer which is provided with a curved portion at a balancing space so that movement of balls is accelerated at the moment a rotational speed of a rotor exceeds a resonant speed, thereby stabilizing the rotation of the rotor without vibration regardless of when the rotational speed of the rotor is less or more than the resonant speed, and a centrifuge using the above balancer. The balancer includes a body which is formed with a balancing space thereinside. The balancing space has a circular circumference, and is defined by a bottom portion, a slanted portion extending upward from the bottom portion, a curved portion formed at an end of the slanted portion, and an upper large-diameter portion extending from the curved portion. The balancer further includes a plurality of balls which are contained in the balancing space.
摘要翻译: 这里公开了一种平衡器,其在平衡空间处设置有弯曲部分,使得在转子的旋转速度超过谐振速度的时刻,球的移动被加速,从而稳定转子的旋转而不产生振动,而不管何时 转子的转速小于或大于共振速度,使用上述平衡器的离心机。 该平衡器包括在其内部形成有平衡空间的主体。 所述平衡空间具有圆形的周长,并且由底部限定,从所述底部向上延伸的倾斜部,形成在所述倾斜部的端部的弯曲部以及从所述弯曲部延伸的上部大直径部 。 平衡器还包括容纳在平衡空间中的多个球。
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公开(公告)号:US08710675B2
公开(公告)日:2014-04-29
申请号:US11677477
申请日:2007-02-21
申请人: Young Cheol Kim , Koo Hong Lee
发明人: Young Cheol Kim , Koo Hong Lee
CPC分类号: H01L23/3107 , H01L23/49575 , H01L24/48 , H01L24/49 , H01L25/0657 , H01L2224/05554 , H01L2224/32145 , H01L2224/48091 , H01L2224/48247 , H01L2224/4917 , H01L2224/49171 , H01L2224/4943 , H01L2224/73265 , H01L2225/0651 , H01L2225/06562 , H01L2225/06582 , H01L2924/00014 , H01L2924/01029 , H01L2924/01033 , H01L2924/01078 , H01L2924/01082 , H01L2924/014 , H01L2924/14 , H01L2924/15311 , H01L2924/181 , H01L2924/19107 , H01L2924/00 , H01L2224/45099 , H01L2224/05599 , H01L2924/00012
摘要: An integrated circuit package system includes a first integrated circuit die having die pads only adjacent a single edge of the first integrated circuit die, forming first bonding lands adjacent the single edge, connecting the die pads and the first bonding lands, and encapsulating the die pads and a portion of the first bonding lands to form a first package.
摘要翻译: 集成电路封装系统包括第一集成电路管芯,其具有仅与第一集成电路管芯的单个边缘相邻的管芯焊盘,形成与单个边缘相邻的第一焊接区域,连接管芯焊盘和第一焊接区域,以及封装管芯焊盘 并且所述第一结合区域的一部分形成第一包装。
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公开(公告)号:US08012867B2
公开(公告)日:2011-09-06
申请号:US11618647
申请日:2006-12-29
申请人: Koo Hong Lee , Il Kwon Shim , Young Cheol Kim , Bongsuk Choi
发明人: Koo Hong Lee , Il Kwon Shim , Young Cheol Kim , Bongsuk Choi
IPC分类号: H01L21/44
CPC分类号: H01L23/3128 , H01L23/3114 , H01L24/48 , H01L24/73 , H01L24/94 , H01L24/97 , H01L25/03 , H01L25/0657 , H01L25/105 , H01L25/50 , H01L2224/16225 , H01L2224/32225 , H01L2224/48145 , H01L2224/48227 , H01L2224/4824 , H01L2224/73204 , H01L2224/73215 , H01L2224/73265 , H01L2224/94 , H01L2224/97 , H01L2225/06506 , H01L2225/06517 , H01L2225/06586 , H01L2225/06596 , H01L2225/1023 , H01L2225/1058 , H01L2924/00014 , H01L2924/01033 , H01L2924/01082 , H01L2924/14 , H01L2924/15311 , H01L2924/1532 , H01L2924/15331 , H01L2924/181 , H01L2224/85 , H01L2224/83 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要: A wafer level chip scale package system is provided including placing a first integrated circuit over a semiconductor wafer having a second integrated circuit; connecting a second electrical interconnect between the first integrated circuit and the second integrated circuit; forming a stress relieving encapsulant on the outer perimeter of the second integrated circuit for covering the second electrical interconnect; and singulating a chip scale package, from the semiconductor wafer, through the stress relieving encapsulant and the semiconductor wafer.
摘要翻译: 提供晶片级芯片级封装系统,包括将第一集成电路放置在具有第二集成电路的半导体晶片上; 连接第一集成电路和第二集成电路之间的第二电互连; 在所述第二集成电路的外周上形成用于覆盖所述第二电互连的应力消除密封剂; 以及从半导体晶片,通过应力释放密封剂和半导体晶片分离芯片级封装。
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公开(公告)号:US20070178667A1
公开(公告)日:2007-08-02
申请号:US11618647
申请日:2006-12-29
申请人: Koo Hong Lee , Il Kwon Shim , Young Cheol Kim , Bongsuk Choi
发明人: Koo Hong Lee , Il Kwon Shim , Young Cheol Kim , Bongsuk Choi
IPC分类号: H01L21/00
CPC分类号: H01L23/3128 , H01L23/3114 , H01L24/48 , H01L24/73 , H01L24/94 , H01L24/97 , H01L25/03 , H01L25/0657 , H01L25/105 , H01L25/50 , H01L2224/16225 , H01L2224/32225 , H01L2224/48145 , H01L2224/48227 , H01L2224/4824 , H01L2224/73204 , H01L2224/73215 , H01L2224/73265 , H01L2224/94 , H01L2224/97 , H01L2225/06506 , H01L2225/06517 , H01L2225/06586 , H01L2225/06596 , H01L2225/1023 , H01L2225/1058 , H01L2924/00014 , H01L2924/01033 , H01L2924/01082 , H01L2924/14 , H01L2924/15311 , H01L2924/1532 , H01L2924/15331 , H01L2924/181 , H01L2224/85 , H01L2224/83 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要: A wafer level chip scale package system is provided including placing a first integrated circuit over a semiconductor wafer having a second integrated circuit; connecting a second electrical interconnect between the first integrated circuit and the second integrated circuit; forming a stress relieving encapsulant on the outer perimeter of the second integrated circuit for covering the second electrical interconnect; and singulating a chip scale package, from the semiconductor wafer, through the stress relieving encapsulant and the semiconductor wafer.
摘要翻译: 提供晶片级芯片级封装系统,包括将第一集成电路放置在具有第二集成电路的半导体晶片上; 连接第一集成电路和第二集成电路之间的第二电互连; 在所述第二集成电路的外周上形成用于覆盖所述第二电互连的应力消除密封剂; 以及从半导体晶片,通过应力释放密封剂和半导体晶片分离芯片级封装。
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公开(公告)号:US20070023162A1
公开(公告)日:2007-02-01
申请号:US11460009
申请日:2006-07-26
申请人: Young-Cheol KIM , Yong-Sik KIM
发明人: Young-Cheol KIM , Yong-Sik KIM
CPC分类号: B60H1/3233
摘要: An air conditioning system for an automobile prevents leakage of condensed water by locating two drain parts respectively on an air conditioning case and a protective cover having a drain structure beneath the air conditioning case. A drain hose, connected to and communicating with the drain parts, discharges the condensed water to the outside of the automobile without dispersion of the condensed water by forming a condensed water discharge pipe positioned on the protective cover. The protective cover, mounted on the bottom surface of the air conditioning case, surrounds the inflow and outflow pipes and has an auxiliary drain part formed at a side thereof. The drain hose connects the drain part of the air conditioning case with the auxiliary drain part of the protective cover.
摘要翻译: 用于汽车的空调系统通过将两个排水部分分别放置在空调箱和在空调箱下方具有排水结构的保护罩来防止冷凝水的泄漏。 与排水部连接并与排水部连通的排水软管,通过形成位于保护罩上的冷凝排水管,将冷凝水排出到汽车外部,而不会使冷凝水分散。 安装在空调箱底面上的保护盖围绕流入管和流出管,并在其一侧形成辅助排水部。 排水软管将空调箱的排水部分与保护盖的辅助排水部分相连。
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公开(公告)号:US5012451A
公开(公告)日:1991-04-30
申请号:US492097
申请日:1990-03-12
申请人: Hyeong-keun An , Young-cheol Kim , Seok-jeong Lee , Jung-jae Yu
发明人: Hyeong-keun An , Young-cheol Kim , Seok-jeong Lee , Jung-jae Yu
摘要: A ROM circuit is provided which can reduce the required area by simplifying a circuit construction. The ROM circuit generates N bit of data programmed at the respective cross section of output lines and word lines by decoding address signal. The ROM circuit comprises a decoder, a gate means, a memory cell array and a precharge means in which the decoder generates a word signal from an input address signal, the gate means supplied a word signal to a corresponding word line according to a clock signal, the memory cell array stores the desired data according to the combinational existence of MOS transistors at the respective cross section of the word line and the output lines, and the precharged means precharges the respective output lines according to the clock signal.
摘要翻译: 提供了通过简化电路结构可以减少所需面积的ROM电路。 ROM电路通过解码地址信号产生在输出线和字线的相应横截面上编程的N位数据。 ROM电路包括解码器,门装置,存储单元阵列和预充电装置,其中解码器从输入地址信号产生字信号,门装置根据时钟信号向相应的字线提供字信号 存储单元阵列根据在字线和输出线的相应截面处的MOS晶体管的组合存在所需数据,并且预充电装置根据时钟信号对各个输出线进行预充电。
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