Method and system for calibrating multi-wire skew

    公开(公告)号:US10560146B2

    公开(公告)日:2020-02-11

    申请号:US16363788

    申请日:2019-03-25

    Abstract: Methods and systems are described for receiving, over a plurality of consecutive signaling intervals, a plurality of codewords, each codeword received as a plurality of symbols via wires of a multi-wire bus, the plurality of symbols received at a plurality of multi-input comparators (MICs), wherein each symbol is received by at least two MICs, generating, for each codeword, a corresponding linear combination of the received symbols, generating a plurality of composite skew measurement signals over the plurality of consecutive signaling intervals, each composite skew measurement signal based on samples of one or more linear combinations, and updating wire-specific skew values of the wires of the multi-wire bus, wherein one or more wire-specific skew values are updated according to composite skew measurement signals associated with linear combinations formed by at least two different MICs.

    CLOCK-EMBEDDED VECTOR SIGNALING CODES
    22.
    发明申请

    公开(公告)号:US20190363916A1

    公开(公告)日:2019-11-28

    申请号:US16533592

    申请日:2019-08-06

    Abstract: Vector signaling codes providing guaranteed numbers of transitions per unit transmission interval are described, along with methods and systems for their generation and use. The described architecture may include multiple communications sub-systems, each having its own communications wire group or sub-channel, clock-embedded signaling code, pre- and post-processing stages to guarantee the desired code transition density, and global encoding and decoding stages to first distribute data elements among the sub-systems, and then to reconstitute the received data from its received sub-system elements.

    METHOD AND SYSTEM FOR CALIBRATING MULTI-WIRE SKEW

    公开(公告)号:US20190238180A1

    公开(公告)日:2019-08-01

    申请号:US16363788

    申请日:2019-03-25

    Abstract: Methods and systems are described for receiving, over a plurality of consecutive signaling intervals, a plurality of codewords, each codeword received as a plurality of symbols via wires of a multi-wire bus, the plurality of symbols received at a plurality of multi-input comparators (MICs), wherein each symbol is received by at least two MICs, generating, for each codeword, a corresponding linear combination of the received symbols, generating a plurality of composite skew measurement signals over the plurality of consecutive signaling intervals, each composite skew measurement signal based on samples of one or more linear combinations, and updating wire-specific skew values of the wires of the multi-wire bus, wherein one or more wire-specific skew values are updated according to composite skew measurement signals associated with linear combinations formed by at least two different MICs.

    METHODS AND SYSTEMS FOR BACKGROUND CALIBRATION OF MULTI-PHASE PARALLEL RECEIVERS

    公开(公告)号:US20180351769A1

    公开(公告)日:2018-12-06

    申请号:US15992105

    申请日:2018-05-29

    Abstract: Methods and systems are described for receiving a plurality of signals in a signaling interval at a multi-input comparator (MIC), and responsively generating an analog linear combination of the received signals, amplifying the analog linear combination of the received signals using an integration stage, receiving the amplified differential voltage at two multi-phase receivers, each multi-phase receiver comprising one or more processing slices, each multi-phase receiver operating in a multi-phase processing path for processing the amplified differential voltage, wherein processing the amplified differential voltage includes generating output data decisions and phase-error information using a first multi-phase receiver of the two multi-phase receivers and selectively adjusting local speculative decision feedback equalization (DFE) slicing offsets of a second multi-phase receiver of the two multi-phase receivers according to the output data decisions generated by the first multi-phase receiver.

    Low power multilevel driver
    25.
    发明授权

    公开(公告)号:US10056903B2

    公开(公告)日:2018-08-21

    申请号:US15582550

    申请日:2017-04-28

    CPC classification number: H03K19/0005 H04B3/04

    Abstract: A driver for transmitting multi-level signals on a multi-wire bus is described that includes at least one current source connected to a transmission line, each current source selectively enabled to source current to the transmission line to drive a line voltage above a termination voltage of a termination voltage source connected to the transmission line via a termination impedance element, wherein each of the at least one current sources has an output impedance different than a characteristic impedance of the transmission line, and at least one current sink connected to the transmission line, each current sink selectively enabled to sink current from the transmission line to drive a line voltage below the termination voltage, each of the at least one current sinks having an output impedance different than the characteristic impedance of the transmission line.

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