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公开(公告)号：US20220173883A1
公开(公告)日：2022-06-02
申请号：US17672410
申请日：2022-02-15
申请人： Kandou Labs, S.A.
发明人： Roger Ulrich , Armin Tajalli , Ali Hormati , Richard Simpson
摘要： Generating, during a first and second signaling interval, an aggregated data signal by forming a linear combination of wire signals received in parallel from wires of a multi-wire bus, wherein at least some of the wire signals undergo a signal level transition during the first and second signaling interval; measuring a signal skew characteristic of the aggregated data signal; and, generating wire-specific skew offset metrics, each wire-specific skew offset metric based on the signal skew characteristic.
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公开(公告)号：US10374846B2
公开(公告)日：2019-08-06
申请号：US16031875
申请日：2018-07-10
申请人： Kandou Labs, S.A.
发明人： Amin Shokrollahi , Brian Holden , Richard Simpson
摘要： Vector signaling codes providing guaranteed numbers of transitions per unit transmission interval are described, along with methods and systems for their generation and use. The described architecture may include multiple communications sub-systems, each having its own communications wire group or sub-channel, clock-embedded signaling code, pre- and post-processing stages to guarantee the desired code transition density, and global encoding and decoding stages to first distribute data elements among the sub-systems, and then to reconstitute the received data from its received sub-system elements.
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公开(公告)号：US20190013927A1
公开(公告)日：2019-01-10
申请号：US15641313
申请日：2017-07-04
申请人： Kandou Labs, S.A.
发明人： Roger Ulrich , Armin Tajalli , Ali Hormati , Richard Simpson
IPC分类号： H04L7/00
摘要： Generating, during a first and second signaling interval, an aggregated data signal by forming a linear combination of wire signals received in parallel from wires of a multi-wire bus, wherein at least some of the wire signals undergo a signal level transition during the first and second signaling interval; measuring a signal skew characteristic of the aggregated data signal; and, generating wire-specific skew offset metrics, each wire-specific skew offset metric based on the signal skew characteristic.
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公开(公告)号：US20170317859A1
公开(公告)日：2017-11-02
申请号：US15582545
申请日：2017-04-28
申请人： Kandou Labs, S.A.
发明人： Ali Hormati , Richard Simpson
CPC分类号： H04L25/03949 , H04L7/0025 , H04L7/0087 , H04L7/033 , H04L25/03057
摘要： Methods and systems are described for generating two comparator outputs by comparing a received signal to a first threshold and a second threshold according to a sampling clock, the first and second thresholds determined by an estimated amount of inter-symbol interference on a multi-wire bus, selecting one of the two comparator outputs as a data decision, the selection based on at least one prior data decision, and selecting one of the two comparator outputs as a phase-error indication, the phase error indication selected in response to identification of a predetermined data decision pattern.
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5.发明授权公开(公告)号：US09686107B2
公开(公告)日：2017-06-20
申请号：US15169446
申请日：2016-05-31
申请人： Kandou Labs, S.A.
发明人： John Fox , Brian Holden , Peter Hunt , John D. Keay , Amin Shokrollahi , Richard Simpson , Anant Singh , Andrew Kevin John Stewart , Giuseppe Surace
CPC分类号： H04L25/4906 , G06F13/426 , H03M5/16 , H03M5/20 , H04L25/0272 , H04L25/4917 , H04L25/493 , H04L69/04 , Y02D10/14 , Y02D10/151
摘要： Systems and methods are described for transmitting data over physical channels to provide a high speed, low latency interface such as between a memory controller and memory devices with significantly reduced or eliminated Simultaneous Switching Output noise. Controller-side and memory-side embodiments of such channel interfaces are disclosed which do not require additional pin count or data transfer cycles, have low power utilization, and introduce minimal additional latency. In some embodiments of the invention, three or more voltage levels are used for signaling.
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6.发明申请Methods and Systems for Chip-to-Chip Communication with Reduced Simultaneous Switching Noise 有权具有降低同时开关噪声的芯片到芯片通信的方法和系统公开(公告)号：US20150381768A1
公开(公告)日：2015-12-31
申请号：US14842511
申请日：2015-09-01
申请人： Kandou Labs, S.A.
发明人： John Fox , Brian Holden , Peter Hunt , John D. Keay , Amin Shokrollahi , Richard Simpson , Anant Singh , Andrew Kevin John Stewart , Giuseppe Surace
IPC分类号： H04L29/06
CPC分类号： H04L25/4906 , G06F13/426 , H03M5/16 , H03M5/20 , H04L25/0272 , H04L25/4917 , H04L25/493 , H04L69/04 , Y02D10/14 , Y02D10/151
摘要： Systems and methods are described for transmitting data over physical channels to provide a high speed, low latency interface such as between a memory controller and memory devices with significantly reduced or eliminated Simultaneous Switching Output noise. Controller-side and memory-side embodiments of such channel interfaces are disclosed which do not require additional pin count or data transfer cycles, have low power utilization, and introduce minimal additional latency. In some embodiments of the invention, three or more voltage levels are used for signaling.
摘要翻译： 描述了用于通过物理信道传输数据的系统和方法，以提供高速，低延迟的接口，例如在显着减少或消除的同时开关输出噪声的存储器控制器和存储器件之间。 公开了这样的信道接口的控制器侧和存储器侧实施例，其不需要额外的引脚数或数据传输周期，具有低功率利用率，并且引入最小的附加等待时间。 在本发明的一些实施例中，三个或更多个电压电平用于信令。
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公开(公告)号：US20150256326A1
公开(公告)日：2015-09-10
申请号：US14717717
申请日：2015-05-20
申请人： Kandou Labs S.A.
发明人： Richard Simpson , Roger Ulrich
CPC分类号： H04L7/0025 , H03L7/0807 , H04L1/0001 , H04L1/0042 , H04L1/0045 , H04L1/0057 , H04L7/00 , H04L7/0334 , H04L25/0272 , H04L25/03 , H04L2001/0094
摘要： Vector signaling code communications systems rely on group transmission of code symbols using multiple signaling channels that must be actively monitored and adjusted to minimize differential signal characteristics. Information obtained during receive detection may be analyzed to identify channel operational characteristics during normal operation and perform non-disruptive channel adjustments. Initialization or start-up adjustment may also be performed using intentionally transmitted patterns.
摘要翻译： 矢量信令码通信系统依赖于使用多个信令信道的码元组的传输，这些信令信道必须被主动监视和调整以最小化差分信号特性。 可以分析在接收检测期间获得的信息，以在正常操作期间识别信道操作特性，并执行非中断信道调整。 初始化或启动调整也可以使用故意传输的模式进行。
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8.发明授权Methods and systems for chip-to-chip communication with reduced simultaneous switching noise 有权具有降低同时开关噪声的芯片到芯片通信的方法和系统公开(公告)号：US09124557B2
公开(公告)日：2015-09-01
申请号：US14158452
申请日：2014-01-17
申请人： Kandou Labs, S.A.
发明人： John Fox , Brian Holden , Peter Hunt , John D. Keay , Amin Shokrollahi , Richard Simpson , Anant Singh , Andrew Kevin John Stewart , Giuseppe Surace
CPC分类号： H04L25/4906 , G06F13/426 , H03M5/16 , H03M5/20 , H04L25/0272 , H04L25/4917 , H04L25/493 , H04L69/04 , Y02D10/14 , Y02D10/151
摘要： Systems and methods are described for transmitting data over physical channels to provide a high speed, low latency interface such as between a memory controller and memory devices with significantly reduced or eliminated Simultaneous Switching Output noise. Controller-side and memory-side embodiments of such channel interfaces are disclosed which do not require additional pin count or data transfer cycles, have low power utilization, and introduce minimal additional latency. In some embodiments of the invention, three or more voltage levels are used for signaling.
摘要翻译： 描述了用于通过物理信道传输数据的系统和方法，以提供高速，低延迟的接口，例如在显着减少或消除的同时开关输出噪声的存储器控制器和存储器件之间。 公开了这样的信道接口的控制器侧和存储器侧实施例，其不需要额外的引脚数或数据传输周期，具有低功率利用率，并且引入最小的附加等待时间。 在本发明的一些实施例中，三个或更多个电压电平用于信令。
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9.发明申请Methods and Systems for Chip-to-Chip Communication with Reduced Simultaneous Switching Noise 有权具有降低同时开关噪声的芯片到芯片通信的方法和系统公开(公告)号：US20140198837A1
公开(公告)日：2014-07-17
申请号：US14158452
申请日：2014-01-17
申请人： Kandou Labs, S.A.
发明人： John Fox , Brian Holden , Peter Hunt , John D. Keay , Amin Shokrollahi , Richard Simpson , Anant Singh , Andrew Kevin John Stewart , Giuseppe Surace
IPC分类号： H04L29/06
CPC分类号： H04L25/4906 , G06F13/426 , H03M5/16 , H03M5/20 , H04L25/0272 , H04L25/4917 , H04L25/493 , H04L69/04 , Y02D10/14 , Y02D10/151
摘要： Systems and methods are described for transmitting data over physical channels to provide a high speed, low latency interface such as between a memory controller and memory devices with significantly reduced or eliminated Simultaneous Switching Output noise. Controller-side and memory-side embodiments of such channel interfaces are disclosed which do not require additional pin count or data transfer cycles, have low power utilization, and introduce minimal additional latency. In some embodiments of the invention, three or more voltage levels are used for signaling.
摘要翻译： 描述了用于通过物理信道传输数据的系统和方法，以提供高速，低延迟的接口，例如在显着减少或消除的同时开关输出噪声的存储器控制器和存储器件之间。 公开了这样的信道接口的控制器侧和存储器侧实施例，其不需要额外的引脚数或数据传输周期，具有低功率利用率，并且引入最小的附加等待时间。 在本发明的一些实施例中，三个或更多个电压电平用于信令。
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公开(公告)号：US11784782B2
公开(公告)日：2023-10-10
申请号：US18158403
申请日：2023-01-23
申请人： Kandou Labs, S.A.
发明人： Roger Ulrich , Armin Tajalli , Ali Hormati , Richard Simpson
CPC分类号： H04L7/0016 , H04L7/0054 , H04L7/0079 , H04L7/033 , H04L25/03 , H04L25/03057 , H04L25/14 , H04L25/49 , H04L25/4904 , H04L7/0025 , H04L25/03878 , H04L2025/03356
摘要： Generating, during a first and second signaling interval, an aggregated data signal by forming a linear combination of wire signals received in parallel from wires of a multi-wire bus, wherein at least some of the wire signals undergo a signal level transition during the first and second signaling interval; measuring a signal skew characteristic of the aggregated data signal; and, generating wire-specific skew offset metrics, each wire-specific skew offset metric based on the signal skew characteristic.
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