LEVEL SHIFTER CIRCUIT
    22.
    发明申请
    LEVEL SHIFTER CIRCUIT 有权
    水平更换电路

    公开(公告)号:US20160248426A1

    公开(公告)日:2016-08-25

    申请号:US15050187

    申请日:2016-02-22

    CPC classification number: H03K19/018507

    Abstract: A level shifter circuit a first transistor connected between a power source terminal of the level shifter circuit and an output terminal of the level shifter circuit, the first transistor being configured to transmit, in response to a first signal and a second signal, a power source voltage applied from the power source terminal to the output terminal, the first signal being received from an input terminal of the level shifter circuit through a first gate of the first transistor, the second signal being received through a second gate of the first transistor, and a second transistor connected between a ground terminal of the level shifter circuit and the output terminal, the second transistor being configured to transmit a ground voltage from the ground terminal to the output terminal in response to a gate signal received through a gate of the second transistor.

    Abstract translation: 电平移位器电路,连接在电平移位器电路的电源端和电平移位器电路的输出端之间的第一晶体管,第一晶体管被配置为响应于第一信号和第二信号,发送电源 从电源端子施加到输出端子的电压,第一信号通过第一晶体管的第一栅极从电平移位器电路的输入端子接收,第二信号通过第一晶体管的第二栅极接收,以及 连接在电平移位器电路的接地端子和输出端子之间的第二晶体管,第二晶体管被配置为响应于通过第二晶体管的栅极接收的栅极信号将接地电压从接地端子传输到输出端子 。

    SRAM DEVICE INCLUDING OXIDE SEMICONDUCTOR

    公开(公告)号:US20230102625A1

    公开(公告)日:2023-03-30

    申请号:US17529817

    申请日:2021-11-18

    Abstract: Provided is a static random-access memory (SRAM) device. The SRAM device includes a substrate including a PMOS area, a circuit wiring structure including an insulating layer and a wiring layer alternately stacked on the substrate, wherein the circuit wiring structure includes a first NMOS area and a second NMOS area vertically separated from the PMOS area with the first NMOS area therebetween, a first transistor including a first gate electrode disposed on the PMOS area, source/drain areas formed on the PMOS area on both sides of the first gate electrode, and a first channel connecting the source and drain areas to each other, a second transistor including a second gate electrode disposed in the first NMOS area and a second channel vertically overlapping the second gate electrode, and a third transistor including a third gate electrode disposed in the second NMOS area and a third channel vertically overlapping the third gate electrode, wherein the first channel includes silicon, wherein the second channel and the third channel include an oxide semiconductor.

    STRETCHABLE DISPLAY DEVICE
    27.
    发明申请

    公开(公告)号:US20210280827A1

    公开(公告)日:2021-09-09

    申请号:US17191276

    申请日:2021-03-03

    Abstract: Provided is a stretchable display device. The stretchable display device includes a substrate and a base pattern on the substrate, wherein the base pattern comprises a first portion, a second portion, and a connection portion configured to connect the first portion to the second portion. The stretchable display device includes a lower electrode on the first portion of the base pattern; an upper electrode on the lower electrode, a light emitting structure between the lower electrode and the upper electrode, and a protective layer configured to cover top and side surfaces of the upper electrode, side surfaces of the light emitting structure, a side surface of the lower electrode, and a portion of a side surface of the base pattern. The upper electrode extends to a top surface of the connection portion and a top surface of the second portion of the base pattern, and the first portion and the second portion of the base pattern extend in a first direction parallel to a top surface of the substrate. The first portion and the second portion are parallel to the top surface of the substrate and are spaced apart from each other in a second direction crossing the first direction.
    The connection portion extends in the second direction. A level of the lowermost surface of the protective layer is disposed between a bottom surface of the lower electrode and a bottom surface of the base pattern.

    FINGERPRINT SENSOR AND ELECTRONIC DEVICE HAVING THE SAME

    公开(公告)号:US20170177922A1

    公开(公告)日:2017-06-22

    申请号:US15380415

    申请日:2016-12-15

    Inventor: Jae-Eun PI

    CPC classification number: G06K9/00053 G06K9/0002 G06K9/00087

    Abstract: Provided is a fingerprint sensor. The fingerprint sensor according to an embodiment of the inventive concept includes a plurality of transmission lines, a plurality of receive lines, and a sensor array including sensor units connected to the plurality of transmission lines. Each of the sensor units includes a switch transistor having a gate terminal and one terminal, which are commonly connected to a corresponding transmission line of the plurality of transmission lines and a sensor transistor connected between the other end of the switch transistor and a corresponding receive line of the plurality of receive lines. The sensor transistor performs a current suppression on in response to a voltage of a virtual gate that is touched by a fingerprint.

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