公开(公告)号：US20150171833A1

公开(公告)日：2015-06-18

申请号：US14335242

申请日：2014-07-18

Applicant: Konkuk University Industrial Cooperation Corp ,  Electronics and Telecommunications Research Institute

Inventor： Jae-Eun PI ,  Sang-Hee PARK ,  Min Ki RYU ,  Chi-Sun HWANG ,  OhSang KWON ,  Eunsuk PARK ,  Kee-Chan PARK ,  YeonKyung KIM

IPC: H03K3/012 ,  H03K5/01

CPC classification number: H03K3/012 ,  H03K4/026 ,  H03K5/01 ,  H03K5/05

Abstract: Provided is a gate driver circuit. The gate driver circuit includes a plurality of sequentially connected stages, and each of stages includes an input unit including two input transistors forming diode connection, a pull-up unit including a pull-up transistor and a bootstrap capacitor, and first and second pull-down units each including two transistors. According to embodiments, an input capacitor is further included which is connected to a node between the input unit and the pull-up unit. In addition, a carry unit is further included which is connected to an output terminal and formed to transmit an output signal in a high state or a low state to a next stage.

Abstract translation: 提供了一个栅极驱动电路。 栅极驱动器电路包括多个顺序连接的级，并且每个级包括一个输入单元，该输入单元包括形成二极管连接的两个输入晶体管，一个包括上拉晶体管和自举电容器的上拉单元，以及第一和第二上拉电路， 每个下降单元包括两个晶体管。 根据实施例，还包括输入电容器，其连接到输入单元和上拉单元之间的节点。 此外，还包括进位单元，其连接到输出端子并且被形成为将处于高状态或低状态的输出信号传输到下一级。

公开(公告)号：US20160248426A1

公开(公告)日：2016-08-25

申请号：US15050187

申请日：2016-02-22

Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE

Inventor： Jae-Eun PI ,  Chunwon BYUN ,  OhSang KWON ,  Eunsuk PARK ,  Min Ki RYU ,  Chi-Sun HWANG

IPC: H03K19/0185

CPC classification number: H03K19/018507

Abstract: A level shifter circuit a first transistor connected between a power source terminal of the level shifter circuit and an output terminal of the level shifter circuit, the first transistor being configured to transmit, in response to a first signal and a second signal, a power source voltage applied from the power source terminal to the output terminal, the first signal being received from an input terminal of the level shifter circuit through a first gate of the first transistor, the second signal being received through a second gate of the first transistor, and a second transistor connected between a ground terminal of the level shifter circuit and the output terminal, the second transistor being configured to transmit a ground voltage from the ground terminal to the output terminal in response to a gate signal received through a gate of the second transistor.

Abstract translation: 电平移位器电路，连接在电平移位器电路的电源端和电平移位器电路的输出端之间的第一晶体管，第一晶体管被配置为响应于第一信号和第二信号，发送电源 从电源端子施加到输出端子的电压，第一信号通过第一晶体管的第一栅极从电平移位器电路的输入端子接收，第二信号通过第一晶体管的第二栅极接收，以及 连接在电平移位器电路的接地端子和输出端子之间的第二晶体管，第二晶体管被配置为响应于通过第二晶体管的栅极接收的栅极信号将接地电压从接地端子传输到输出端子 。