公开(公告)号：US20160343835A1

公开(公告)日：2016-11-24

申请号：US14785397

申请日：2015-01-30

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Seongyeol Yoo ,  Youngsuk Song ,  Heecheol Kim ,  Seungjin Choi

IPC: H01L29/66 ,  H01L27/12 ,  H01L29/786 ,  H01L21/477

CPC classification number: H01L29/66969 ,  H01L21/44 ,  H01L21/477 ,  H01L21/82 ,  H01L27/1225 ,  H01L27/1259 ,  H01L29/45 ,  H01L29/458 ,  H01L29/66757 ,  H01L29/66765 ,  H01L29/786 ,  H01L29/78618 ,  H01L29/78666 ,  H01L29/78669 ,  H01L29/7869

Abstract: The present invention relates to a method for manufacturing a thin film transistor and an array substrate, and corresponding devices. In the thin film transistor manufacturing process, the base substrate is annealed after the formation of the patterns of the active layer, the source and the drain in the thin film transistor, so as to thermally diffuse ions of the source and the drain at an ohmic contact between the active layer and the source, as well as the drain, to the active layer, and further to provide the active layer with ions of the source and the drain for changing the components of the active layer, which reduces the resistance at the ohmic contact between the active layer and the source, as well as the drain, and guarantees the uniformity and reliability of the thin film transistor. Moreover, annealing treatment is relatively simpler in implementation as compared with the plasma treatment, and will not increase the complexity of the method for manufacturing the entire thin film transistor, which is good for thin film transistor production efficiency.

Abstract translation: 本发明涉及薄膜晶体管和阵列基板的制造方法及其对应装置。 在薄膜晶体管制造工艺中，在形成薄膜晶体管中的有源层，源极和漏极的图案之后，对基底基板进行退火，以将源极和漏极的离子以欧姆 有源层和源极之间的接触以及漏极到有源层，并且还提供有源层与源极和漏极的离子，用于改变有源层的分量，这降低了在 有源层和源极之间的欧姆接触以及漏极，并保证了薄膜晶体管的均匀性和可靠性。 此外，与等离子体处理相比，退火处理相对简单，并且不会增加制造整个薄膜晶体管的方法的复杂性，这对于薄膜晶体管的生产效率是有利的。

公开(公告)号：US09502577B2

公开(公告)日：2016-11-22

申请号：US14416227

申请日：2014-04-16

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Ke Wang ,  Seongyeol Yoo ,  Ce Ning ,  Wei Yang

IPC: H01L29/786 ,  H01L21/4763 ,  H01L29/51 ,  H01L29/49 ,  H01L29/66 ,  H01L29/423 ,  H01L29/417

CPC classification number: H01L29/7869 ,  H01L21/47635 ,  H01L29/41733 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/513 ,  H01L29/518 ,  H01L29/66969 ,  H01L29/78606

Abstract: Provided are oxide thin-film transistor and display device employing the same, and method for manufacturing an oxide thin-film transistor array substrate. A source electrode and a drain electrode are located below an oxide active layer pattern, and a gate electrode is located below the source electrode and the drain electrode, and the gate insulating layer is located between the gate electrode and the source electrode/the drain electrode.

Abstract translation: 提供了氧化物薄膜晶体管和采用该氧化物薄膜晶体管的显示装置，以及制造氧化物薄膜晶体管阵列基板的方法。 源电极和漏极位于氧化物有源层图案的下方，栅电极位于源极和漏电极的下方，栅极绝缘层位于栅电极和源电极/漏电极之间 。

公开(公告)号：US09465264B2

公开(公告)日：2016-10-11

申请号：US14362241

申请日：2013-10-12

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Seungjin Choi ,  Seongyeol Yoo ,  Youngsuk Song

IPC: H01L21/77 ,  H01L21/027 ,  H01L27/12 ,  G02F1/1333 ,  G02F1/1343 ,  G02F1/1362 ,  G02F1/1368 ,  H01L29/423 ,  H01L29/49 ,  H01L29/786 ,  G03F7/00

CPC classification number: G02F1/134363 ,  G02F1/133345 ,  G02F1/13439 ,  G02F1/1368 ,  G02F2001/133357 ,  G03F7/00 ,  H01L21/77 ,  H01L27/12 ,  H01L27/1218 ,  H01L27/124 ,  H01L27/1248 ,  H01L27/1262 ,  H01L27/1288 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/78606 ,  H01L29/78636 ,  H01L29/7869

Abstract: An array substrate and a manufacturing method thereof and a display device are provided, and the array substrate comprises: a substrate (1); a thin film transistor, a passivation layer (5) and a transparent electrode (6), sequentially formed on the substrate, wherein a groove (51) is formed in an upper surface of the passivation layer (5), and the transparent electrode (6) is provided in the groove (51).

Abstract translation: 提供阵列基板及其制造方法和显示装置，阵列基板包括：基板（1）; 薄膜晶体管，钝化层（5）和透明电极（6），其顺序地形成在所述基板上，其中在所述钝化层（5）的上表面中形成有沟槽（51），并且所述透明电极 6）设置在凹槽（51）中。

公开(公告)号：US20160284741A1

公开(公告)日：2016-09-29

申请号：US14778257

申请日：2015-04-16

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Ke Wang ,  Seongyeol Yoo

IPC: H01L27/12 ,  G02F1/1362 ,  G02F1/1368 ,  H01L29/786 ,  G02F1/1343

CPC classification number: H01L27/1288 ,  G02F1/13439 ,  G02F1/136286 ,  G02F1/1368 ,  G02F2001/136295 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/127 ,  H01L29/66969 ,  H01L29/7869

Abstract: The present invention provides an array substrate fabricating method. The array substrate fabricating method comprises the steps of: forming a semiconductor material layer and a first photoresist layer on a substrate successively, forming a pattern of an active layer comprising thin film transistors by using the semiconductor material layer and the first photoresist layer through photoetching technology, and reserving the first photoresist layer at least on conductive areas of the active layer when the thin film transistors are turned on; and forming a first material layer on the substrate on which the active layer is formed and the first photoresist layer is reserved on the active layer, and forming a pattern comprising first structures by using the first material layer through the photoetching technology. The method is adapted for fabricating an array substrate using metal oxide thin film transistors.

Abstract translation: 本发明提供一种阵列基板的制造方法。 阵列基板制造方法包括以下步骤：连续地在基板上形成半导体材料层和第一光致抗蚀剂层，通过使用半导体材料层和第一光致抗蚀剂层通过光刻技术形成包括薄膜晶体管的有源层的图案 并且当所述薄膜晶体管导通时，至少在所述有源层的导电区域上保留所述第一光致抗蚀剂层; 以及在其上形成有源层的衬底上形成第一材料层，并且在有源层上保留第一光致抗蚀剂层，以及通过使用第一材料层通过光刻技术形成包括第一结构的图案。 该方法适用于使用金属氧化物薄膜晶体管制造阵列基板。

公开(公告)号：US09276014B2

公开(公告)日：2016-03-01

申请号：US14852810

申请日：2015-09-14

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Seongyeol Yoo ,  Youngsuk Song ,  Heecheol Kim ,  Seungjin Choi

IPC: H01L29/66 ,  H01L29/786 ,  H01L27/12 ,  G02F1/1362 ,  G02F1/1368 ,  G02F1/1343 ,  H01L29/24 ,  H01L23/522 ,  H01L23/31

CPC classification number: H01L27/1225 ,  G02F1/13439 ,  G02F1/136227 ,  G02F1/136286 ,  G02F1/1368 ,  G02F2001/134372 ,  H01L21/77 ,  H01L23/3171 ,  H01L23/5226 ,  H01L27/124 ,  H01L27/1259 ,  H01L27/127 ,  H01L27/1288 ,  H01L29/24 ,  H01L29/7869 ,  H01L2224/24 ,  H01L2224/73267 ,  H01L2224/82 ,  H01L2224/92244

Abstract: An array substrate, a method of fabricating the same, and a liquid crystal display device are disclosed. The method comprises: sequentially forming a first transparent conductive material layer, an insulation material layer, a semiconductor material layer and a photoresist layer on a substrate base and forming patterns including a gate line, a gate, a gate insulation layer, a semiconductor layer and a first transparent electrode by patterning process; forming a passivation layer and forming a source via and a drain via connected to the semiconductor layer in the passivation layer; sequentially forming a second transparent conductive material layer and a source-drain metal layer and forming patterns including a source, a drain and a second transparent electrode by patterning process, the gate insulation layer is formed only on the gate and the gate line, the source and the drain include stacked second transparent conductive material layer and source-drain metal layer.

公开(公告)号：US09070599B2

公开(公告)日：2015-06-30

申请号：US14361396

申请日：2013-10-31

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Heecheol Kim ,  Youngsuk Song ,  Seongyeol Yoo ,  Seungjin Choi

IPC: H01L27/12 ,  G02F1/1362 ,  G02F1/1368 ,  H01L29/786 ,  H01L21/283 ,  H01L21/3213 ,  H01L23/31 ,  H01L29/10 ,  H01L21/768 ,  H01L29/66 ,  H01L29/417

CPC classification number: H01L27/124 ,  G02F1/1362 ,  G02F1/136227 ,  G02F1/1368 ,  G02F2201/40 ,  H01L21/283 ,  H01L21/32133 ,  H01L21/76802 ,  H01L23/3171 ,  H01L27/1248 ,  H01L27/1259 ,  H01L27/1288 ,  H01L29/1033 ,  H01L29/41733 ,  H01L29/4175 ,  H01L29/66765 ,  H01L29/78696 ,  H01L2924/0002 ,  H01L2924/00

Abstract: An array substrate, a manufacturing method thereof and a display device are provided, and the array substrate comprises: a substrate (1); a plurality of data lines (16), formed on the substrate and extending in a first direction; a plurality of gate lines (15), formed on the substrate (1), crossing the plurality of data lines (15), and extending in a second direction perpendicular to the first direction; a plurality of pixel regions, defined by the plurality of gate lines (15) and the plurality of data lines (15) crossing each other and arranged in a matrix form, wherein each of the pixel regions is provided with a thin film transistor and a pixel electrode (12), wherein, the thin film transistor comprises: a gate electrode (2), connected with one of the plurality of gate lines (15); a gate insulating layer (3), provided above the gate line (15) and the gate electrode (2); an active layer (5), formed on the gate insulating layer (3) and disposed corresponding to the gate electrode (2); a drain electrode (8) and a source electrode (9), disposed opposite to each other above the active layer (5) and having a channel region of the thin film transistor therebetween; a filling layer (4), provided between the gate electrode (2) and the gate line (15) connected with the gate electrode, and the drain and source electrodes (8) and (9); and a passivation layer (10), provided on the source electrode (9), the drain electrode (8) and the active layer (5), wherein at a position directly facing the gate line (15), the passivation layer (10) is provided with a passivation layer through hole (11) configured to perform a connection between the drain electrode (8) and the pixel electrode (12).

Abstract translation: 提供阵列基板，其制造方法和显示装置，并且阵列基板包括：基板（1）; 多个数据线（16），形成在所述基板上并沿第一方向延伸; 多个栅极线（15），形成在所述基板（1）上，与所述多条数据线（15）交叉并且沿与所述第一方向垂直的第二方向延伸; 由多个栅极线（15）和多条数据线（15）限定的多个像素区域，彼此交叉并以矩阵形式布置，其中每个像素区域设置有薄膜晶体管和 像素电极（12），其中，所述薄膜晶体管包括：栅电极（2），与所述多条栅极线（15）之一连接; 栅极绝缘层（3），设置在栅极线（15）和栅电极（2）之上; 形成在所述栅极绝缘层（3）上并对应于所述栅极（2）设置的有源层（5）; 漏电极（8）和源电极（9），其在有源层（5）上方相对设置，并且在其间具有薄膜晶体管的沟道区域; 设置在与栅极电极连接的栅电极（2）和栅极线（15）之间的填充层（4）以及漏极和源电极（8）和（9）; 以及设置在源电极（9），漏极（8）和有源层（5）上的钝化层（10），其中在直接面向栅极线（15）的位置处，钝化层（10） 设置有被配置为执行漏电极（8）和像素电极（12）之间的连接的钝化层通孔（11）。

公开(公告)号：US09040344B2

公开(公告)日：2015-05-26

申请号：US13984090

申请日：2012-12-13

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Seungjin Choi ,  Heecheol Kim ,  Youngsuk Song ,  Seongyeol Yoo

IPC: H01L21/02 ,  H01L27/12 ,  H01L29/786

CPC classification number: H01L29/7869 ,  G02F1/134363 ,  G02F2001/134372 ,  G02F2001/136231 ,  H01L21/02565 ,  H01L21/02664 ,  H01L27/1203 ,  H01L27/1225

Abstract: A method for fabricating array substrate, an array substrate and a display device. The method for fabricating the array substrate comprises forming a thin film transistor, a first transparent electrode (14) and a second transparent electrode (19), wherein a multi dimensional electric field is created by the first transparent electrode (17) and the second transparent electrode (19), wherein forming the first transparent electrode (17) comprises: forming a metal oxide film presenting semiconductor properties; forming the first transparent electrode (17) by subjecting a portion of the metal oxide film to metallization treatment, and forming a semiconductor active layer (141) from a portion which is not subjected to the metallization treatment.

Abstract translation: 阵列基板，阵列基板和显示装置的制造方法。 制造阵列基板的方法包括形成薄膜晶体管，第一透明电极（14）和第二透明电极（19），其中由第一透明电极（17）和第二透明电极（17）产生多维电场 电极（19），其中形成所述第一透明电极（17）包括：形成呈现半导体特性的金属氧化物膜; 通过对金属氧化物膜的一部分进行金属化处理来形成第一透明电极（17），并且从未进行金属化处理的部分形成半导体活性层（141）。

公开(公告)号：US08946701B2

公开(公告)日：2015-02-03

申请号：US13703551

申请日：2012-10-25

Applicant: BOE Technology Group Co., Ltd.

Inventor： Zhanfeng Cao ,  Xiaoyang Tong ,  Qi Yao ,  Seongyeol Yoo

IPC: H01L29/12 ,  H01L29/786 ,  H01L29/06 ,  H01L29/51

CPC classification number: H01L29/7869 ,  H01L29/06 ,  H01L29/51 ,  H01L29/786 ,  H01L29/78606

Abstract: Embodiments of the present invention provide a thin film transistor, an array substrate and a display device. The thin film transistor comprises a gate layer, a first insulating layer, an active layer, an etch stop layer and a source/drain electrode layer, wherein the active layer is made of a metal oxide material, the first insulating layer, the active layer, the etch stop layer and the source/drain electrode layer are sequentially stacked from bottom to top, the source/drain electrode layer contains an interval separating a source electrode and a drain electrode therein, the etch stop layer is located below the interval, and the etch stop layer has a width greater than that of the interval, and the first insulating layer comprises a laminate of a first sub-insulation layer and a second sub-insulation layer, the second sub-insulation layer is in contact with the active layer and made of an oxygen-rich insulating material.

Abstract translation: 本发明的实施例提供一种薄膜晶体管，阵列基板和显示装置。 薄膜晶体管包括栅极层，第一绝缘层，有源层，蚀刻停止层和源极/漏极电极层，其中有源层由金属氧化物材料制成，第一绝缘层，有源层 ，蚀刻停止层和源极/漏极电极层从底部到顶部依次层叠，源极/漏极层包含在其中分离源极和漏极的间隔，蚀刻停止层位于间隔的下方，并且 所述蚀刻停止层的宽度大于所述间隔的宽度，并且所述第一绝缘层包括第一次级绝缘层和第二次级绝缘层的叠层，所述第二次级绝缘层与所述有源层接触 并由富氧绝缘材料制成。

公开(公告)号：US20150028342A1

公开(公告)日：2015-01-29

申请号：US14361396

申请日：2013-10-31

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Heecheol Kim ,  Youngsuk Song ,  Seongyeol Yoo ,  Seungjin Choi

IPC: H01L27/12 ,  H01L29/417 ,  H01L21/3213 ,  H01L21/283 ,  H01L23/31 ,  H01L29/10

CPC classification number: H01L27/124 ,  G02F1/1362 ,  G02F1/136227 ,  G02F1/1368 ,  G02F2201/40 ,  H01L21/283 ,  H01L21/32133 ,  H01L21/76802 ,  H01L23/3171 ,  H01L27/1248 ,  H01L27/1259 ,  H01L27/1288 ,  H01L29/1033 ,  H01L29/41733 ,  H01L29/4175 ,  H01L29/66765 ,  H01L29/78696 ,  H01L2924/0002 ,  H01L2924/00

Abstract: An array substrate, a manufacturing method thereof and a display device are provided, and the array substrate comprises: a substrate (1); a plurality of data lines (16), formed on the substrate and extending in a first direction; a plurality of gate lines (15), formed on the substrate (1), crossing the plurality of data lines (15), and extending in a second direction perpendicular to the first direction; a plurality of pixel regions, defined by the plurality of gate lines (15) and the plurality of data lines (15) crossing each other and arranged in a matrix form, wherein each of the pixel regions is provided with a thin film transistor and a pixel electrode (12), wherein, the thin film transistor comprises: a gate electrode (2), connected with one of the plurality of gate lines (15); a gate insulating layer (3), provided above the gate line (15) and the gate electrode (2); an active layer (5), formed on the gate insulating layer (3) and disposed corresponding to the gate electrode (2); a drain electrode (8) and a source electrode (9), disposed opposite to each other above the active layer (5) and having a channel region of the thin film transistor therebetween; a filling layer (4), provided between the gate electrode (2) and the gate line (15) connected with the gate electrode, and the drain and source electrodes (8) and (9); and a passivation layer (10), provided on the source electrode (9), the drain electrode (8) and the active layer (5), wherein at a position directly facing the gate line (15), the passivation layer (10) is provided with a passivation layer through hole (11) configured to perform a connection between the drain electrode (8) and the pixel electrode (12).

Abstract translation: 提供阵列基板，其制造方法和显示装置，并且阵列基板包括：基板（1）; 多个数据线（16），形成在所述基板上并沿第一方向延伸; 多个栅极线（15），形成在所述基板（1）上，与所述多条数据线（15）交叉并且沿与所述第一方向垂直的第二方向延伸; 由多个栅极线（15）和多条数据线（15）限定的多个像素区域，彼此交叉并以矩阵形式布置，其中每个像素区域设置有薄膜晶体管和 像素电极（12），其中，所述薄膜晶体管包括：栅电极（2），与所述多条栅极线（15）之一连接; 栅极绝缘层（3），设置在栅极线（15）和栅电极（2）之上; 形成在所述栅极绝缘层（3）上并对应于所述栅极（2）设置的有源层（5）; 漏电极（8）和源电极（9），其在有源层（5）上方相对设置，并且在其间具有薄膜晶体管的沟道区域; 设置在与栅极电极连接的栅电极（2）和栅极线（15）之间的填充层（4）以及漏极和源电极（8）和（9）; 以及设置在源电极（9），漏极（8）和有源层（5）上的钝化层（10），其中在直接面向栅极线（15）的位置处，钝化层（10） 设置有被配置为执行漏电极（8）和像素电极（12）之间的连接的钝化层通孔（11）。

公开(公告)号：US20140159022A1

公开(公告)日：2014-06-12

申请号：US14105145

申请日：2013-12-12

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Youngsuk SONG ,  Seongyeol Yoo ,  Seungjin Choi ,  Heecheol Kim

IPC: H01L27/32 ,  H01L51/56

CPC classification number: H01L27/3248 ,  H01L27/3206 ,  H01L27/322 ,  H01L27/3258 ,  H01L27/3272 ,  H01L51/5209 ,  H01L51/5265 ,  H01L51/5271 ,  H01L51/56 ,  H01L2251/5315

Abstract: This invention provides an array substrate, a method for fabricating the same, and an OLED display device, which can solve the technical problem that the existing OLED display device has low luminous efficiency. Each pixel unit of the array substrate comprises: a TFT drive layer; an OLED further away from the substrate than the TFT drive layer and driven by it, the OLED sequentially comprises a first electrode, a light emitting layer, and a transparent second electrode, wherein the first electrode is a reflection layer, or the first electrode is transparent and has a reflection layer disposed thereunder; a transflective layer further away from the substrate than the OLED and forming a microcavity structure with the reflection layer; and a color filter film disposed between the OLED and the transflective layer and located in the microcavity structure. The present invention is particularly suitable for a WOLED display device.

Abstract translation: 本发明提供阵列基板，其制造方法和OLED显示装置，其可以解决现有的OLED显示装置的发光效率低的技术问题。 阵列基板的每个像素单元包括：TFT驱动层; OLED比TFT驱动层更远离OLED驱动的OLED，OLED顺序地包括第一电极，发光层和透明的第二电极，其中第一电极是反射层，或者第一电极是 透明并具有设置在其下面的反射层; 比OLED更远离衬底的半透反射层，并与反射层形成微腔结构; 以及设置在OLED和透反射层之间并且位于微腔结构中的滤色膜。 本发明特别适用于WOLED显示装置。