公开(公告)号：US20210225650A1

公开(公告)日：2021-07-22

申请号：US17220441

申请日：2021-04-01

Applicant: Applied Materials, Inc.

Inventor： Prashant Kumar KULSHRESHTHA ,  Ziqing DUAN ,  Karthik Thimmavajjula NARASIMHA ,  Kwangduk Douglas LEE ,  Bok Hoen KIM

IPC: H01L21/033 ,  H01L21/3065 ,  C23C16/505 ,  H01L21/02 ,  C23C16/32

Abstract: Implementations of the present disclosure generally relate to the fabrication of integrated circuits. More particularly, the implementations described herein provide techniques for deposition of boron-carbon films on a substrate. In one implementation, a method of processing a substrate is provided. The method comprises flowing a hydrocarbon-containing gas mixture into a processing volume of a processing chamber having a substrate positioned therein, wherein the substrate is heated to a substrate temperature from about 400 degrees Celsius to about 700 degrees Celsius, flowing a boron-containing gas mixture into the processing volume and generating an RF plasma in the processing volume to deposit a boron-carbon film on the heated substrate, wherein the boron-carbon film has an elastic modulus of from about 200 to about 400 GPa and a stress from about −100 MPa to about 100 MPa.

公开(公告)号：US20190172714A1

公开(公告)日：2019-06-06

申请号：US16188514

申请日：2018-11-13

Applicant: Applied Materials, Inc.

Inventor： Sarah BOBEK ,  Prashant KUMAR KULSHRESHTHA ,  Rajesh PRASAD ,  Kwangduk Douglas LEE ,  Harry WHITESELL ,  Hidetaka OSHIO ,  Dong Hyung LEE ,  Deven Matthew Raj MITTAL

IPC: H01L21/033 ,  C23C16/505 ,  C23C16/26 ,  C23C16/56 ,  H01L21/02 ,  H01L21/3115 ,  H01L21/311

Abstract: Implementations described herein generally relate to the fabrication of integrated circuits. More particularly, the implementations described herein provide techniques for deposition of amorphous carbon films on a substrate. In one implementation, a method of forming an amorphous carbon film is provided. The method comprises depositing an amorphous carbon film on an underlayer positioned on a susceptor in a first processing region. The method further comprises implanting a dopant or inert species into the amorphous carbon film in a second processing region. The dopant or inert species is selected from carbon, boron, nitrogen, silicon, phosphorous, argon, helium, neon, krypton, xenon or combinations thereof. The method further comprises patterning the doped amorphous carbon film. The method further comprises etching the underlayer.

公开(公告)号：US20180076032A1

公开(公告)日：2018-03-15

申请号：US15695180

申请日：2017-09-05

Applicant: Applied Materials, Inc.

Inventor： Jiarui WANG ,  Prashant Kumar KULSHRESHTHA ,  Eswaranand VENKATASUBRAMANIAN ,  Susmit Singha ROY ,  Kwangduk Douglas LEE

IPC: H01L21/033 ,  H01L21/02 ,  H01L27/11556 ,  H01L27/11582 ,  C23C16/50 ,  C23C16/40 ,  C23C16/34

CPC classification number: H01L21/0332 ,  C23C16/0272 ,  C23C16/06 ,  C23C16/342 ,  C23C16/345 ,  C23C16/401 ,  C23C16/45523 ,  C23C16/50 ,  C23C16/505 ,  C23C16/52 ,  H01L21/02112 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/02175 ,  H01L21/02205 ,  H01L21/02274 ,  H01L21/02304 ,  H01L21/0337 ,  H01L21/31144 ,  H01L21/67103 ,  H01L21/6831 ,  H01L27/11548 ,  H01L27/11556 ,  H01L27/11575 ,  H01L27/11582

Abstract: Implementations of the present disclosure generally relate to the fabrication of integrated circuits. More particularly, the implementations described herein provide techniques for deposition of thick hardmask films on a substrate. In one implementation, a method of forming a hardmask layer on a substrate is provided. The method comprises applying a chucking voltage to a substrate positioned on an electrostatic chuck in a processing chamber, forming a seed layer comprising boron on a film stack disposed on a substrate by supplying a seed layer gas mixture in the processing chamber while maintaining the chucking voltage, forming a transition layer comprising boron and tungsten on the seed layer by supplying a transition layer gas mixture in the processing chamber and forming a bulk hardmask layer on the transition layer by supplying a main deposition gas mixture in the processing chamber.

公开(公告)号：US20170309525A1

公开(公告)日：2017-10-26

申请号：US15492428

申请日：2017-04-20

Applicant: Applied Materials, Inc.

Inventor： Yoichi SUZUKI ,  Michael Wenyoung TSIANG ,  Kwangduk Douglas LEE ,  Takashi MORII ,  Yuta GOTO

IPC: H01L21/66 ,  H01L21/67 ,  C23C16/50 ,  H01L21/324 ,  H01L21/02 ,  C23C16/56 ,  C23C16/52 ,  H01L21/677

CPC classification number: H01L22/20 ,  C23C16/46 ,  C23C16/50 ,  C23C16/52 ,  C23C16/56 ,  H01L21/02274 ,  H01L21/324 ,  H01L21/67098 ,  H01L21/67109 ,  H01L21/67167 ,  H01L21/67196 ,  H01L21/67201 ,  H01L21/67207 ,  H01L21/67253 ,  H01L21/67288 ,  H01L21/67742 ,  H01L22/12

Abstract: The present disclosure generally relates to a method for performing semiconductor device fabrication, and more particularly, to improvements in lithographic overlay techniques. The method for improved overlay includes depositing a material on a substrate, heating a substrate in a chamber using thermal energy, measuring a local stress pattern of each substrate, wherein measuring the local stress pattern measures an amount of change in a depth of the deposited material on the substrate, plotting a plurality of points on a k map to determine a local stress pattern of the substrate, adjusting the thermal energy applied to the points on the k map, determining a sensitivity value for each of the points on the k map, and applying a correction factor to the applied thermal energy to adjust the local stress pattern.

公开(公告)号：US20170069464A1

公开(公告)日：2017-03-09

申请号：US15214063

申请日：2016-07-19

Applicant: Applied Materials, Inc.

Inventor： Zheng John YE ,  Abdul Aziz KHAJA ,  Amit Kumar BANSAL ,  Kwangduk Douglas LEE ,  Xing LIN ,  Jianhua ZHOU ,  Addepalli Sai SUSMITA ,  Juan Carlos ROCHA-ALVAREZ

IPC: H01J37/32 ,  H01L21/67 ,  C23C16/50 ,  H01L21/683

CPC classification number: H01J37/32082 ,  C23C16/50 ,  C23C16/5096 ,  H01J37/32715 ,  H01J2237/334 ,  H01L21/67069 ,  H01L21/67103 ,  H01L21/6831

Abstract: Implementations of the present disclosure generally relate to methods and apparatus for generating and controlling plasma, for example RF filters, used with plasma chambers. In one implementation, a plasma processing apparatus is provided. The plasma processing apparatus comprises a chamber body, a powered gas distribution manifold enclosing a processing volume and a radio frequency (RF) filter. A pedestal having a substrate-supporting surface is disposed in the processing volume. A heating assembly comprising one or more heating elements is disposed within the pedestal for controlling a temperature profile of the substrate-supporting surface. A tuning assembly comprising a tuning electrode is disposed within the pedestal between the one or more heating elements and the substrate-supporting surface. The RF filter comprises an air core inductor, wherein at least one of the heating elements, the tuning electrode, and the gas distribution manifold is electrically coupled to the RF filter.

Abstract translation: 本公开的实施方式一般涉及用于产生和控制等离子体的方法和装置，例如与等离子体室一起使用的RF滤波器。 在一个实施方式中，提供了等离子体处理装置。 等离子体处理装置包括室主体，封闭处理容积的动力气体分配歧管和射频（RF）过滤器。 具有基板支撑表面的基座设置在处理体积中。 包括一个或多个加热元件的加热组件设置在基座内用于控制基板支撑表面的温度分布。 包括调谐电极的调谐组件设置在基座之间的一个或多个加热元件和基板支撑表面之间。 RF滤波器包括空心电感器，其中至少一个加热元件，调谐电极和气体分配歧管电耦合到RF滤波器。

公开(公告)号：US20170062218A1

公开(公告)日：2017-03-02

申请号：US15203032

申请日：2016-07-06

Applicant: Applied Materials, Inc.

Inventor： Ziqing DUAN ,  Kwangduk Douglas LEE ,  Abdul Aziz KHAJA ,  Amit Kumar BANSAL ,  Bok Hoen KIM ,  Prashant Kumar KULSHRESHTHA

IPC: H01L21/033 ,  C23C16/455 ,  C23C16/505

CPC classification number: H01L21/0338 ,  C23C16/26 ,  C23C16/4404 ,  C23C16/455 ,  C23C16/45557 ,  C23C16/505 ,  C23C16/5096 ,  H01L21/02115 ,  H01L21/02274 ,  H01L21/0332 ,  H01L21/0335 ,  H01L21/0337 ,  H01L21/31111 ,  H01L21/31122

Abstract: Implementations of the present disclosure generally relate to the fabrication of integrated circuits. More particularly, the implementations described herein provide techniques for deposition of boron-containing amorphous carbon films on a substrate with reduced particle contamination. In one implementation, the method comprises flowing a hydrocarbon-containing gas mixture into a processing volume having a substrate positioned therein, flowing a boron-containing gas mixture into the processing volume, stabilizing the pressure in the processing volume for a predefined RF-on delay time period, generating an RF plasma in the processing volume after the predefined RF-on delay time period expires to deposit a boron-containing amorphous film on the substrate, exposing the processing volume of the process chamber to a dry cleaning process and depositing an amorphous boron season layer over at least one surface in the processing volume of the process chamber.

Abstract translation: 本公开的实施方式一般涉及集成电路的制造。 更具体地，本文所述的实施方案提供了用于在具有减少的颗粒污染的基底上沉积含硼无定形碳膜的技术。 在一个实施方案中，该方法包括使含烃气体混合物流入具有位于其中的基底的处理体积，使含硼气体混合物流入处理体积中，将处理体积中的压力稳定在预定义的射频开启延迟 时间段，在预定义的射频导通延迟时间段到期之后在处理容积中产生RF等离子体以在基底上沉积含硼非晶膜，将处理室的处理体积暴露于干法清洗过程中并沉积非晶态 硼化季节层在处理室的处理体积中的至少一个表面上。

公开(公告)号：US20160099147A1

公开(公告)日：2016-04-07

申请号：US14549380

申请日：2014-11-20

Applicant: Applied Materials, Inc.

Inventor： Prashant Kumar KULSHRESHTHA ,  Sudha RATHI ,  Praket P. JHA ,  Saptarshi BASU ,  Kwangduk Douglas LEE ,  Martin J. SEAMONS ,  Bok Hoen KIM ,  Ganesh BALASUBRAMANIAN ,  Ziqing DUAN ,  Lei JING ,  Mandar B. PANDIT

IPC: H01L21/02 ,  C23C16/455 ,  C23C16/458 ,  C23C16/46 ,  H01L21/66 ,  H01L21/033

CPC classification number: H01L21/02274 ,  C23C16/04 ,  C23C16/26 ,  C23C16/455 ,  C23C16/45502 ,  C23C16/45508 ,  C23C16/45565 ,  C23C16/458 ,  C23C16/4584 ,  C23C16/4586 ,  C23C16/46 ,  H01L21/02115 ,  H01L21/0337 ,  H01L21/31144 ,  H01L22/12

Abstract: Methods for modulating local stress and overlay error of one or more patterning films may include modulating a gas flow profile of gases introduced into a chamber body, flowing gases within the chamber body toward a substrate, rotating the substrate, and unifying a center-to-edge temperature profile of the substrate by controlling the substrate temperature with a dual zone heater. A chamber for depositing a film may include a chamber body comprising one or more processing regions. The chamber body may include a gas distribution assembly having a blocker plate for delivering gases into the one or more processing regions. The blocker plate may have a first region and a second region, and the first region and second region each may have a plurality of holes. The chamber body may have a dual zone heater.

Abstract translation: 用于调制一个或多个图案化膜的局部应力和覆盖误差的方法可以包括调节引入室主体的气体的气流分布，将腔体内的气体朝向衬底流动，旋转衬底， 通过使用双区加热器控制基板温度，来实现基板的边缘温度分布。 用于沉积膜的室可以包括包括一个或多个处理区域的室主体。 腔室主体可以包括气体分配组件，其具有用于将气体输送到一个或多个处理区域中的阻挡板。 阻挡板可以具有第一区域和第二区域，并且第一区域和第二区域各自可以具有多个孔。 腔体可以具有双区加热器。

公开(公告)号：US20140017897A1

公开(公告)日：2014-01-16

申请号：US14028025

申请日：2013-09-16

Applicant: Applied Materials, Inc.

Inventor： Martin Jay SEAMONS ,  Sudha RATHI ,  Kwangduk Douglas LEE ,  Deenesh PADHI ,  Bok Hoen KIM ,  Chiu CHAN

IPC: H01L21/64

CPC classification number: H01L21/64 ,  C23C16/0272 ,  C23C16/26 ,  H01L21/02115 ,  H01L21/02274 ,  H01L21/31144

Abstract: Embodiments of the present invention generally relate to the fabrication of integrated circuits and particularly to the deposition of a boron containing amorphous carbon layer on a semiconductor substrate. In one embodiment, a boron-containing amorphous carbon film is disclosed. The boron-containing amorphous carbon film comprises from about 10 to 60 atomic percentage of boron, from about 20 to about 50 atomic percentage of carbon, and from about 10 to about 30 atomic percentage of hydrogen.

Abstract translation: 本发明的实施例一般涉及集成电路的制造，特别涉及在半导体衬底上沉积含硼无定形碳层。 在一个实施方案中，公开了含硼无定形碳膜。 含硼无定形碳膜包含约10至60原子百分数的硼，约20至约50原子百分比的碳和约10至约30原子百分比的氢。

公开(公告)号：US20200328063A1

公开(公告)日：2020-10-15

申请号：US16848553

申请日：2020-04-14

Applicant: Applied Materials, Inc.

Inventor： Sarah Michelle BOBEK ,  Venkata Sharat Chandra PARIMI ,  Prashant Kumar KULSHRESHTHA ,  Kwangduk Douglas LEE

IPC: H01J37/32 ,  H01L21/683

Abstract: One or more embodiments described herein generally relate to methods for chucking and de-chucking a substrate to/from an electrostatic chuck used in a semiconductor processing system. Generally, in embodiments described herein, the method includes: (1) applying a first voltage from a direct current (DC) power source to an electrode disposed within a pedestal; (2) introducing process gases into a process chamber; (3) applying power from a radio frequency (RF) power source to a showerhead; (4) performing a process on the substrate; (5) stopping application of the RF power; (6) removing the process gases from the process chamber; and (7) stopping applying the DC power.

公开(公告)号：US20200255940A1

公开(公告)日：2020-08-13

申请号：US16784456

申请日：2020-02-07

Applicant: Applied Materials, Inc.

Inventor： Byung Seok KWON ,  Lu XU ,  Prashant Kumar KULSHRESHTHA ,  Seoyoung LEE ,  Dong Hyung LEE ,  Kwangduk Douglas LEE

IPC: C23C16/44 ,  H01L21/67 ,  H01J37/32

Abstract: Implementations of the disclosure generally relate to a method of cleaning a semiconductor processing chamber. In one implementation, a method of cleaning a deposition chamber includes flowing a nitrogen containing gas into a processing region within the deposition chamber, striking a plasma in the processing region utilizing a radio frequency power, introducing a cleaning gas into a remote plasma source that is fluidly connected to the deposition chamber, generating reactive species of the cleaning gas in the remote plasma source, introducing the cleaning gas into the deposition chamber, and removing deposits on interior surfaces of the deposition chamber at different etch rates.