-
公开(公告)号:US11985911B2
公开(公告)日:2024-05-14
申请号:US17651790
申请日:2022-02-19
申请人: TetraMem Inc.
发明人: Minxian Zhang , Ning Ge
CPC分类号: H10N70/841 , H10B63/80 , H10N70/023 , H10N70/8833
摘要: Technologies relating to RRAM crossbar array circuits with specialized interface layers for the low current operations are disclosed. An example apparatus includes: a substrate; a bottom electrode formed on the substrate; a first layer formed on the bottom electrode; an RRAM oxide layer formed on the first layer and the bottom electrode; and a top electrode formed on the RRAM oxide layer. The first layer may be a continuous layer or a discontinuous layer. The apparatus may further comprise a second layer formed between the RRAM oxide layer and the top electrode. The second layer may be a continuous layer or a discontinuous layer.
-
公开(公告)号:US11978566B2
公开(公告)日:2024-05-07
申请号:US17045076
申请日:2019-07-31
申请人: Tsinghua University
发明人: Haiquan Zhang , Zuoyi Zhang , Junfeng Nie , Hongke Li , Xin Wang , Jiguo Liu , Yujie Dong
CPC分类号: G21C19/202 , B65G65/4818 , B65G2201/0214
摘要: The present application relates to the field of mechanical engineering technologies, and particularly to an unloading device. The unloading device includes a power mechanism, a transmission mechanism, and an execution mechanism that are connected in sequence from top to bottom; wherein the execution mechanism includes a shafting assembly and a turntable assembly that are connected in sequence from top to bottom; wherein the turntable assembly includes an upper auxiliary fence, a middle main disturbance disk, and a lower reclaiming portion that are arranged in sequence from top to bottom. The unloading device provided by the present application is easy to control, and ensures the reclaiming reliability of the spherical materials and the stability of the sphere flow unloading, which can meet the requirements of long life and reliable operation of the unloading device under light load and low speed working conditions and achieve the convenient maintenance.
-
公开(公告)号:US11972545B2
公开(公告)日:2024-04-30
申请号:US17482998
申请日:2021-09-23
申请人: Intel Corporation
发明人: Anbang Yao , Ming Lu , Yikai Wang , Shandong Wang , Yurong Chen , Sungye Kim , Attila Tamas Afra
CPC分类号: G06T5/50 , G06N3/02 , G06T7/13 , G06V40/161 , G06V40/171 , G06T2207/20084 , G06T2207/30201
摘要: The present disclosure provides an apparatus and method of guided neural network model for image processing. An apparatus may comprise a guidance map generator, a synthesis network and an accelerator. The guidance map generator may receive a first image as a content image and a second image as a style image, and generate a first plurality of guidance maps and a second plurality of guidance maps, respectively from the first image and the second image. The synthesis network may synthesize the first plurality of guidance maps and the second plurality of guidance maps to determine guidance information. The accelerator may generate an output image by applying the style of the second image to the first image based on the guidance information.
-
公开(公告)号:US11961179B2
公开(公告)日:2024-04-16
申请号:US18305511
申请日:2023-04-24
申请人: Intel Corporation
发明人: Prasoonkumar Surti , Abhishek R. Appu , Subhajit Dasgupta , Srivallaba Mysore , Michael J. Norris , Vasanth Ranganathan , Joydeep Ray
CPC分类号: G06T15/80 , G06T1/20 , G06T1/60 , G06T15/005 , G06T2210/52
摘要: One embodiment provides for a graphics processing unit comprising a processing cluster to perform multi-rate shading via coarse pixel shading and output shaded coarse pixels for processing by a post-shader pixel processing pipeline.
-
公开(公告)号:US11960405B2
公开(公告)日:2024-04-16
申请号:US18148749
申请日:2022-12-30
申请人: Intel Corporation
IPC分类号: G06F12/0882 , G06F9/4401 , G06F9/50 , G06F9/54 , G06F11/30 , G06F12/06 , G06F12/0837 , G06F12/1045
CPC分类号: G06F12/0882 , G06F9/4411 , G06F9/5016 , G06F9/544 , G06F11/3006 , G06F11/3037 , G06F12/0607 , G06F12/0837 , G06F12/1054 , G06F12/1063
摘要: Graphics processors for implementing multi-tile memory management are disclosed. In one embodiment, a graphics processor includes a first graphics device having a local memory, a second graphics device having a local memory, and a graphics driver to provide a single virtual allocation with a common virtual address range to mirror a resource to each local memory of the first and second graphics devices.
-
公开(公告)号:US11958518B2
公开(公告)日:2024-04-16
申请号:US17156116
申请日:2021-01-22
发明人: Chunhai Gao , Chao Liu , Feng Bao , Chunyu Zhang , Ziyu Wu
IPC分类号: B61L27/16 , B61L23/04 , B61L23/18 , B61L23/34 , B61L25/02 , B61L27/04 , B61L27/14 , B61L27/20 , B61L15/00
CPC分类号: B61L27/16 , B61L23/041 , B61L23/18 , B61L23/34 , B61L25/021 , B61L27/04 , B61L27/14 , B61L27/20 , B61L15/0072
摘要: Embodiments of the present application provide a method and a device for controlling train formation tracking, the method comprising: obtaining a current distance between a first train and a second train in a train formation, wherein the first train is adjacent to the second train and located behind the second train; determining a target tracking mode of the first train based on the current distance, wherein the target tracking mode is one of a speed tracking mode, a distance tracking mode and a braking mode; and tracking the second train, by the first train based on the target tracking mode. Tracking efficiency is improved according to the method of the embodiments of the present application.
-
公开(公告)号:US11956403B1
公开(公告)日:2024-04-09
申请号:US18181614
申请日:2023-03-10
CPC分类号: H04N1/4052 , H04N1/52
摘要: A system is disclosed. The system includes at least one physical memory device to store edge enhancement logic and one or more processors coupled with the at least one physical memory device to execute the edge enhancement logic to receive a plurality of pels in a continuous tone image (CTI), receive compensation data for pel forming elements associated with each of the plurality of pels, receive edge enhancement transfer functions, determine whether each of the plurality of pels is an edge pel, perform edge enhancement processing for each of the determined edge pels, including generating a final pel value for the pel based on the pel value for the pel, the edge enhancement transfer function associated with the pel, and the compensation data associated with the pel and perform compensation processing for each of the determined not edge pels, including generating a final pel value for the pel based on the pel value for the pel, and the compensation data associated with the pel.
-
28.
公开(公告)号:US11954835B2
公开(公告)日:2024-04-09
申请号:US18255164
申请日:2022-04-21
发明人: Jiawei Shan , Ruitong Zheng , Shiwei Wang , Luofeng Shen , Hongpeng Li
CPC分类号: G06T5/50 , G01S17/89 , G06T7/90 , G06T17/00 , G06V10/56 , G06T2207/10024 , G06T2207/20221
摘要: An image fusion method based on image and LiDAR point cloud is provided. The method comprises: acquiring a first image and sparse point cloud data, point cloud data in each channel of the sparse point cloud data corresponding to pixels in the first image respectively, and the sparse point cloud data and the first image having space and time synchronicity; obtaining a target gradient value corresponding to at least one target pixel in the first image according to the first image, the target pixel being a non-edge pixel of the first image; up-sampling the sparse point cloud data based on at least one target gradient value to obtain dense point cloud data, the target gradient value being determined according to a corresponding target pixel between adjacent channels of the sparse point cloud data; and obtaining a target fusion image based on the first image and the dense point cloud data.
-
公开(公告)号:US11954062B2
公开(公告)日:2024-04-09
申请号:US17310540
申请日:2020-03-14
申请人: INTEL CORPORATION
发明人: Joydeep Ray , Niranjan Cooray , Subramaniam Maiyuran , Altug Koker , Prasoonkumar Surti , Varghese George , Valentin Andrei , Abhishek Appu , Guadalupe Garcia , Pattabhiraman K , Sungye Kim , Sanjay Kumar , Pratik Marolia , Elmoustapha Ould-Ahmed-Vall , Vasanth Ranganathan , William Sadler , Lakshminarayanan Striramassarma
IPC分类号: G06F12/00 , G06F7/544 , G06F7/575 , G06F7/58 , G06F9/30 , G06F9/38 , G06F9/50 , G06F12/02 , G06F12/06 , G06F12/0802 , G06F12/0804 , G06F12/0811 , G06F12/0862 , G06F12/0866 , G06F12/0871 , G06F12/0875 , G06F12/0882 , G06F12/0888 , G06F12/0891 , G06F12/0893 , G06F12/0895 , G06F12/0897 , G06F12/1009 , G06F12/128 , G06F15/78 , G06F15/80 , G06F17/16 , G06F17/18 , G06T1/20 , G06T1/60 , H03M7/46 , G06N3/08 , G06T15/06
CPC分类号: G06F15/7839 , G06F7/5443 , G06F7/575 , G06F7/588 , G06F9/3001 , G06F9/30014 , G06F9/30036 , G06F9/3004 , G06F9/30043 , G06F9/30047 , G06F9/30065 , G06F9/30079 , G06F9/3887 , G06F9/5011 , G06F9/5077 , G06F12/0215 , G06F12/0238 , G06F12/0246 , G06F12/0607 , G06F12/0802 , G06F12/0804 , G06F12/0811 , G06F12/0862 , G06F12/0866 , G06F12/0871 , G06F12/0875 , G06F12/0882 , G06F12/0888 , G06F12/0891 , G06F12/0893 , G06F12/0895 , G06F12/0897 , G06F12/1009 , G06F12/128 , G06F15/8046 , G06F17/16 , G06F17/18 , G06T1/20 , G06T1/60 , H03M7/46 , G06F9/3802 , G06F9/3818 , G06F9/3867 , G06F2212/1008 , G06F2212/1021 , G06F2212/1044 , G06F2212/302 , G06F2212/401 , G06F2212/455 , G06F2212/60 , G06N3/08 , G06T15/06
摘要: Embodiments described herein provide techniques to enable the dynamic reconfiguration of memory on a general-purpose graphics processing unit. One embodiment described herein enables dynamic reconfiguration of cache memory bank assignments based on hardware statistics. One embodiment enables for virtual memory address translation using mixed four kilobyte and sixty-four kilobyte pages within the same page table hierarchy and under the same page directory. One embodiment provides for a graphics processor and associated heterogenous processing system having near and far regions of the same level of a cache hierarchy.
-
公开(公告)号:US11947977B2
公开(公告)日:2024-04-02
申请号:US18146289
申请日:2022-12-23
申请人: Intel Corporation
发明人: Li Xu , Haihao Xiang , Feng Chen , Travis Schluessler , Yuheng Zhang , Sen Lin
IPC分类号: G06F9/448 , G06F16/215 , G06T1/20 , G06T1/60
CPC分类号: G06F9/4488 , G06F16/215 , G06T1/20 , G06T1/60
摘要: Embodiments are generally directed to a system and method for adapting executable object to a processing unit. An embodiment of a method to adapt an executable object from a first processing unit to a second processing unit, comprises: adapting the executable object optimized for the first processing unit of a first architecture, to the second processing unit of a second architecture, wherein the second architecture is different from the first architecture, wherein the executable object is adapted to perform on the second processing unit based on a plurality of performance metrics collected while the executable object is performed on the first processing unit and the second processing unit.
-
-
-
-
-
-
-
-
-