-
公开(公告)号:US12051754B2
公开(公告)日:2024-07-30
申请号:US17862909
申请日:2022-07-12
Applicant: Samsung Electronics Co., Ltd.
Inventor: Sujin Jung , Junbeom Park , Kihwan Kim , Sunguk Jang , Youngdae Cho
IPC: H01L29/786 , H01L21/02 , H01L29/06 , H01L29/423 , H01L29/66
CPC classification number: H01L29/78696 , H01L21/02532 , H01L21/02603 , H01L21/02645 , H01L29/0673 , H01L29/42392 , H01L29/66545 , H01L29/66742 , H01L29/78618
Abstract: A semiconductor device, including a silicon on insulator (SOI) substrate is disclosed. The device may include gate structures formed on the SOI substrate and being spaced apart from each other in a horizontal direction, and a plurality of channels spaced apart from each other in a vertical direction. Each of the channels may extend through each of the gate structures in the horizontal direction. The device may include a seed layer and a source/drain region. The source/drain region may be connected to the channels, and each sidewall of the source/drain region in the horizontal direction may have a concave-convex shape. The device may include a protruding portion of the source/drain region formed between the gate structures that protrudes in the horizontal direction compared to a non-protruding portion of the source/drain region formed between the channels.
-
公开(公告)号:US20220352388A1
公开(公告)日:2022-11-03
申请号:US17862909
申请日:2022-07-12
Applicant: Samsung Electronics Co., Ltd.
Inventor: SUJIN JUNG , Junbeom Park , Kihwan Kim , Sunguk Jang , Youngdae Cho
IPC: H01L29/786 , H01L29/06 , H01L29/423 , H01L29/66 , H01L21/02
Abstract: A semiconductor device, including a silicon on insulator (SOI) substrate is disclosed. The device may include gate structures formed on the SOI substrate and being spaced apart from each other in a horizontal direction, and a plurality of channels spaced apart from each other in a vertical direction. Each of the channels may extend through each of the gate structures in the horizontal direction. The device may include a seed layer and a source/drain region. The source/drain region may be connected to the channels, and each sidewall of the source/drain region in the horizontal direction may have a concave-convex shape. The device may include a protruding portion of the source/drain region formed between the gate structures that protrudes in the horizontal direction compared to a non-protruding portion of the source/drain region formed between the channels.
-
公开(公告)号:US20220222871A1
公开(公告)日:2022-07-14
申请号:US17389576
申请日:2021-07-30
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Abdelrahman Abdelhamed , Michael Scott Brown , Jonghwa Yim , Jihwan Choe , Kihwan Kim
Abstract: A method for generating an image that includes at least one of a vignette effect or a grain effect corresponding to an input image may include obtaining the input image including at least one of the vignette effect or the grain effect; identifying at least one of a vignette parameter or a grain parameter of the input image; obtaining at least one of a vignette filter based on the vignette parameter or a grain layer based on the grain parameter; and generating the image that includes at least one of the vignette effect or the grain effect by applying at least one of the vignette filter or the grain layer to the image.
-
公开(公告)号:US20250120121A1
公开(公告)日:2025-04-10
申请号:US18733327
申请日:2024-06-04
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Unki KIM , Kihwan Kim , Chanyoung Kim , Jeongho Yoo , Ingyu Jang , Sujin Jung
IPC: H01L29/786 , H01L29/06 , H01L29/16 , H01L29/167 , H01L29/423 , H01L29/66 , H01L29/775
Abstract: A semiconductor memory device is provided. The semiconductor memory device includes: a substrate; an active region extending in a first direction on the substrate; a plurality of channel layers stacked on the active region and spaced apart from each other in a vertical direction perpendicular to the first direction; a gate structure extending on the active region in a second direction perpendicular to the first direction and the vertical direction, and surrounding the plurality of channel layers; a source/drain region provided on at least one side of the gate structure on the active region and electrically connected to the plurality of channel layers; and a plurality of anti-diffusion layers stacked and spaced apart from each other in the vertical direction and extending in the second direction.
-
公开(公告)号:US12087766B2
公开(公告)日:2024-09-10
申请号:US17383749
申请日:2021-07-23
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Sujin Jung , Kihwan Kim , Sunguk Jang , Youngdae Cho
IPC: H01L27/088 , H01L29/06 , H01L29/78
CPC classification number: H01L27/0886 , H01L29/0669 , H01L29/7851
Abstract: An integrated circuit (IC) device includes a fin-type active region extending longitudinally in a first lateral direction on a substrate. A nanosheet is apart from a fin top surface of the fin-type active region in a vertical direction. An inner insulating spacer is between the substrate and the nanosheet. A gate line includes a main gate portion and a sub-gate portion. The main gate portion extends longitudinally in a second lateral direction on the nanosheet. The sub-gate portion is integrally connected to the main gate portion and between the substrate and the nanosheet. A source/drain region is in contact with the inner insulating spacer and the nanosheet. The source/drain region includes a single crystalline semiconductor body and at least one lower stacking fault surface linearly extending from the inner insulating spacer through the single crystalline semiconductor body.
-
公开(公告)号:US11631202B2
公开(公告)日:2023-04-18
申请号:US17389576
申请日:2021-07-30
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Abdelrahman Abdelhamed , Michael Scott Brown , Jonghwa Yim , Jihwan Choe , Kihwan Kim
Abstract: A method for generating an image that includes at least one of a vignette effect or a grain effect corresponding to an input image may include obtaining the input image including at least one of the vignette effect or the grain effect; identifying at least one of a vignette parameter or a grain parameter of the input image; obtaining at least one of a vignette filter based on the vignette parameter or a grain layer based on the grain parameter; and generating the image that includes at least one of the vignette effect or the grain effect by applying at least one of the vignette filter or the grain layer to the image.
-
公开(公告)号:US11211456B2
公开(公告)日:2021-12-28
申请号:US16751726
申请日:2020-01-24
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Sujin Jung , Kihwan Kim , Sunguk Jang , Youngdae Cho
Abstract: A semiconductor device including: an active pattern on a substrate, the active pattern including a recess, the recess having a “V” shape; a growth prevention pattern on the recess; gate structures on portions of the active pattern at opposite sides of the recess; channels spaced apart from each other in a vertical direction perpendicular to an upper surface of the substrate, each of the channels extending through one of the gate structures; and a source/drain layer on the growth prevention pattern, the source/drain layer contacting the channels.
-
公开(公告)号:US12132119B2
公开(公告)日:2024-10-29
申请号:US17489181
申请日:2021-09-29
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Kihwan Kim , Sunguk Jang , Sujin Jung , Youngdae Cho
IPC: H01L29/786 , H01L21/02 , H01L29/06 , H01L29/161 , H01L29/167 , H01L29/417 , H01L29/423 , H01L29/66
CPC classification number: H01L29/78696 , H01L21/02532 , H01L21/02576 , H01L21/02579 , H01L21/0259 , H01L29/0665 , H01L29/167 , H01L29/42392 , H01L29/66545 , H01L29/66553 , H01L29/66742 , H01L29/78618
Abstract: A semiconductor device includes an active region extending in a first direction on a substrate, a plurality of channel layers vertically spaced apart from each other on the active region and including a semiconductor material, a gate structure extending in a second direction on the substrate, and a source/drain region disposed on the active region on at least one side of the gate structure. The gate structure intersects the active region and the plurality of channel layers, and surrounds the plurality of channel layers. The source/drain region contacts the plurality of channel layers and includes first impurities. In at least a portion of the plurality of channel layers, a lower region adjacent to the active region includes the first impurities and second impurities at a first concentration, and an upper region includes the first impurities and the second impurities at a second concentration lower than the first concentration.
-
公开(公告)号:US12051722B2
公开(公告)日:2024-07-30
申请号:US18205671
申请日:2023-06-05
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Sujin Jung , Kihwan Kim , Sunguk Jang , Youngdae Cho
IPC: H01L29/10 , H01L29/06 , H01L29/08 , H01L29/16 , H01L29/423 , H01L29/78 , H01L29/786
CPC classification number: H01L29/1037 , H01L29/0653 , H01L29/0665 , H01L29/0847 , H01L29/1608 , H01L29/42392 , H01L29/785 , H01L29/78696
Abstract: A semiconductor device including: an active pattern on a substrate, the active pattern including a recess, the recess having a “V” shape; a growth prevention pattern on the recess; gate structures on portions of the active pattern at opposite sides of the recess; channels spaced apart from each other in a vertical direction perpendicular to an upper surface of the substrate, each of the channels extending through one of the gate structures; and a source/drain layer on the growth prevention pattern, the source/drain layer contacting the channels.
-
公开(公告)号:US11682698B2
公开(公告)日:2023-06-20
申请号:US17541878
申请日:2021-12-03
Applicant: Samsung Electronics Co., Ltd.
Inventor: Junghan Lee , Changhee Kim , Kihwan Kim , Suhyueon Park , Jaehong Choi
IPC: H01L29/08 , H01L21/8234 , H01L27/088 , H01L29/78 , H01L29/167 , H01L29/423 , H01L29/786 , H01L29/06 , H01L29/36
CPC classification number: H01L29/0847 , H01L21/823418 , H01L21/823431 , H01L27/0886 , H01L29/086 , H01L29/0865 , H01L29/0869 , H01L29/0878 , H01L29/0882 , H01L29/0886 , H01L29/167 , H01L29/42392 , H01L29/78696
Abstract: A semiconductor device including an active region protruding from an upper surface of a substrate and extending in a first horizontal direction, at least two gate electrodes extending in a second horizontal direction and crossing the active region, the second horizontal direction crossing the first horizontal direction, a source/drain region in the active region between the gate electrodes may be provided. The source/drain region includes a recess region, an outer doped layer on an inner wall of the recess region, an intermediate doped layer on the outer doped layer, and an inner doped layer on the intermediate doped layer and filling the recess region. One of the outer doped layer or the intermediate doped layer includes antimony, and the inner doped layer includes phosphorous.
-
-
-
-
-
-
-
-
-