公开(公告)号：US20080026508A1

公开(公告)日：2008-01-31

申请号：US11868624

申请日：2007-10-08

Applicant: Vance Archer ,  Kouros Azimi ,  Daniel Chesire ,  Warren Gladden ,  Seung Kang ,  Taeho Kook ,  Sailesh Merchant ,  Vivian Ryan

Inventor： Vance Archer ,  Kouros Azimi ,  Daniel Chesire ,  Warren Gladden ,  Seung Kang ,  Taeho Kook ,  Sailesh Merchant ,  Vivian Ryan

IPC: H01L21/00

CPC classification number: H01L23/36 ,  H01L21/4871 ,  H01L25/165 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2924/01019 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/15311 ,  H01L2924/16195 ,  H01L2924/00

Abstract: An integrated circuit device incorporating a metallurgical bond to enhance thermal conduction to a heat sink. In a semiconductor device, a surface of an integrated circuit die is metallurgically bonded to a surface of a heat sink. In an exemplary method of manufacturing the device, the upper surface of a package substrate includes an inner region and a peripheral region. The integrated circuit die is positioned over the substrate surface and a first surface of the integrated circuit die is placed in contact with the package substrate. A metallic layer is formed on a second opposing surface of the integrated circuit die. A preform is positioned on the metallic layer and a heat sink is positioned over the preform. A joint layer is formed with the preform, metallurgically bonding the heat sink to the second surface of the integrated circuit die.

Abstract translation: 一种集成电路装置，其包括冶金结合以增强对散热器的热传导。 在半导体器件中，集成电路管芯的表面冶金地结合到散热器的表面。 在制造器件的示例性方法中，封装衬底的上表面包括内部区域和周边区域。 集成电路管芯位于衬底表面上，并且集成电路管芯的第一表面被放置成与封装衬底接触。 金属层形成在集成电路管芯的第二相对表面上。 预成型件定位在金属层上，并且散热器位于预制件上。 用预成型件形成接合层，将散热器冶金结合到集成电路管芯的第二表面。

公开(公告)号：US20070168818A1

公开(公告)日：2007-07-19

申请号：US11673714

申请日：2007-02-12

Applicant: Seung Kang ,  Subramanian Karthikeyan ,  Sailesh Merchant ,  Lisa Mullin

Inventor： Seung Kang ,  Subramanian Karthikeyan ,  Sailesh Merchant ,  Lisa Mullin

IPC: G01R31/30 ,  G06F11/00

CPC classification number: G01R31/2877 ,  G01R31/2856

Abstract: A semiconductor test device includes a test circuit having contacts for applying an electrical signal and measuring electrical parameters of the test circuit. The semiconductor test device also includes an integrally formed heating circuit comprising at least one circuit meander positioned adjacent the test circuit for raising a temperature within a portion of the test circuit.

Abstract translation: 半导体测试装置包括具有用于施加电信号和测量测试电路的电参数的触点的测试电路。 半导体测试装置还包括整体形成的加热电路，其包括邻近测试电路定位的至少一个电路弯道，用于升高测试电路的一部分内的温度。

公开(公告)号：US20060226535A1

公开(公告)日：2006-10-12

申请号：US11448560

申请日：2006-06-07

Applicant: Joze Antol ,  Philip Seitzer ,  Daniel Chesire ,  Rafe Mengel ,  Vance Archer ,  Thomas Gans ,  Taeho Kook ,  Sailesh Merchant

Inventor： Joze Antol ,  Philip Seitzer ,  Daniel Chesire ,  Rafe Mengel ,  Vance Archer ,  Thomas Gans ,  Taeho Kook ,  Sailesh Merchant

IPC: H01L23/04

CPC classification number: H01L24/05 ,  H01L23/3171 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/02166 ,  H01L2224/04042 ,  H01L2224/05073 ,  H01L2224/05093 ,  H01L2224/05166 ,  H01L2224/05181 ,  H01L2224/05187 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/451 ,  H01L2224/48463 ,  H01L2224/49175 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/05042 ,  H01L2924/14 ,  H01L2224/45099 ,  H01L2924/00015

Abstract: Disclosed herein are novel support structures for pad reinforcement in conjunction with new bond pad designs for semiconductor devices. The new bond pad designs avoid the problems associated with probe testing by providing a probe region that is separate from a wire bond region. Separating the probe region 212 from the wire bond region 210 and forming the bond pad 211 over active circuitry has several advantages. By separating the probe region 212 from the wire bond region 210, the wire bond region 210 is not damaged by probe testing, allowing for more reliable wire bonds. Also, forming the bond pad 211 over active circuitry, including metal interconnect layers, allows the integrated circuit to be smaller.

公开(公告)号：US20060192647A1

公开(公告)日：2006-08-31

申请号：US11414902

申请日：2006-05-01

Applicant: Edward Harris ,  Sailesh Merchant ,  Kurt Steiner ,  Susan Vitkavage

Inventor： Edward Harris ,  Sailesh Merchant ,  Kurt Steiner ,  Susan Vitkavage

IPC: H01F5/00

CPC classification number: H01L24/10 ,  H01F41/041 ,  H01L23/5227 ,  H01L24/13 ,  H01L27/08 ,  H01L28/10 ,  H01L2224/05001 ,  H01L2224/05027 ,  H01L2224/0508 ,  H01L2224/05124 ,  H01L2224/05166 ,  H01L2224/05181 ,  H01L2224/05184 ,  H01L2224/05572 ,  H01L2224/056 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2224/45124 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01068 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/30105 ,  H01L2924/30107 ,  Y10T29/4902 ,  H01L2924/00 ,  H01L2224/48

Abstract: An inductor formed within an integrated circuit and a method for forming the inductor. The inductor comprises an underlying layer of aluminum formed in a first metallization layer and patterned and etched into the desired shape. In one embodiment the aluminum line comprises a spiral shape. According to a damascene process, a conductive runner, preferably of copper, is formed in a dielectric layer overlying the aluminum line and in electrical contact therewith. The aluminum line and the conductive runner cooperate to form the inductor. In another embodiment the aluminum line and the conductive runner are formed in a vertically spaced-apart orientation, with tungsten plugs or conductive vias formed to provide electrical connection therebetween. A method for forming the inductor comprises forming an aluminum conductive line and forming a conductive runner over the conductive line.

公开(公告)号：US07948914B2

公开(公告)日：2011-05-24

申请号：US12322028

申请日：2009-01-28

Applicant: Kouros Azimi ,  Mohammad Mobin ,  Roger Fratti ,  Sailesh Merchant ,  Kenneth Paist

Inventor： Kouros Azimi ,  Mohammad Mobin ,  Roger Fratti ,  Sailesh Merchant ,  Kenneth Paist

IPC: G01R31/08

CPC classification number: H04W48/04 ,  H04W12/06 ,  H04W64/00

Abstract: In described embodiments, elements of a wireless home network employ learned power security for the network. An access point, router, or other wireless base station emits and receives signals having corresponding signal strengths. Wireless devices coupled to the base station through a radio link are moved through the home network at boundary points of the home and the signal strength is measured at each device and communicated to the base station. Based on the signal strength information from the emitted signals measured at the boundary points and/or from measured signal strength information of signals received from the boundary points, the base station determines a network secure area. The base station declines permission of devices attempting to use or join the home network that exhibit signal strength characteristics less than boundary values for the network secure area.

Abstract translation: 在所描述的实施例中，无线家庭网络的元件采用学习的网络安全性。 接入点，路由器或其他无线基站发射和接收具有相应信号强度的信号。 通过无线电链路耦合到基站的无线设备在家庭的边界点移动通过家庭网络，并且在每个设备处测量信号强度并将其传送到基站。 基于从边界点测量的发射信号的信号强度信息和/或从边界点接收的信号的测量信号强度信息，基站确定网络安全区域。 基站拒绝尝试使用或加入家庭网络的设备的权限，这些设备的信号强度特性小于网络安全区域的边界值。

公开(公告)号：US20100250234A1

公开(公告)日：2010-09-30

申请号：US12413958

申请日：2009-03-30

Applicant: Kouros Azimi ,  Sailesh Merchant

Inventor： Kouros Azimi ,  Sailesh Merchant

IPC: G06F17/28

CPC classification number: G06F17/289

Abstract: In described embodiments, a point of sale system, such as a cash register, provides for translation from standard language to desired native language on a receipt. Translation might be initiated through user (e.g., purchaser) input, manually or from a credit card, for example, and translation is accomplished through a database accessed by the point of sale system. Consequently, the point of sale system provides at least one receipt to the purchaser that identifies purchases as line item descriptions, and, in some cases, the price paid for each line item, in the purchaser's native language that might be used, for example, to accurately prepare vouchers.

Abstract translation: 在所描述的实施例中，诸如收银机的销售点系统在收据上提供从标准语言到期望母语的翻译。 可以例如通过用户（例如，购买者）手动地或从信用卡输入翻译，并且通过由销售点系统访问的数据库来实现翻译。 因此，销售点系统向购买者提供至少一个识别订单项目描述的收货单，并且在某些情况下，以可能使用的购买者本地语言为每个行项目支付的价格，例如， 准确准备优惠券。

公开(公告)号：US20070069365A1

公开(公告)日：2007-03-29

申请号：US11237633

申请日：2005-09-28

Applicant: Vance Archer ,  Daniel Chesire ,  Seung Kang ,  Taeho Kooh ,  Sailesh Merchant

Inventor： Vance Archer ,  Daniel Chesire ,  Seung Kang ,  Taeho Kooh ,  Sailesh Merchant

IPC: H01L23/12

CPC classification number: G01R31/2884

Abstract: Disclosed herein are novel damage detection circuitries implemented on the periphery of a semiconductor device. The circuitries disclosed herein enable the easy identification of cracks and deformation, and other types of damage that commonly occur during test and assembly processes of semiconductor devices.

Abstract translation: 这里公开了在半导体器件的外围实现的新的损伤检测电路。 这里公开的电路使得能够容易地识别裂纹和变形以及在半导体器件的测试和组装过程中通常发生的其它类型的损坏。

公开(公告)号：US20070063352A1

公开(公告)日：2007-03-22

申请号：US11469960

申请日：2006-09-05

Applicant: Vance Archer ,  Michael Ayukawa ,  Mark Bachman ,  Daniel Chesire ,  Seung Kang ,  Taeho Kook ,  Sailesh Merchant ,  Kurt Steiner

Inventor： Vance Archer ,  Michael Ayukawa ,  Mark Bachman ,  Daniel Chesire ,  Seung Kang ,  Taeho Kook ,  Sailesh Merchant ,  Kurt Steiner

IPC: H01L23/48

CPC classification number: H01L24/13 ,  H01L24/11 ,  H01L2224/0231 ,  H01L2224/0401 ,  H01L2224/05124 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05181 ,  H01L2224/05556 ,  H01L2224/05572 ,  H01L2224/05647 ,  H01L2224/05666 ,  H01L2224/13007 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2224/16 ,  H01L2924/0001 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01073 ,  H01L2924/01076 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/14 ,  H01L2224/05552 ,  H01L2924/013

Abstract: The present invention provides a solder bump structure. In one aspect, the solder bump structure is utilized in a semiconductor device, such as an integrated circuit. The semiconductor device comprises active devices located over a semiconductor substrate, interconnect layers comprising copper formed over the active devices, and an outermost metallization layer positioned over the interconnect layers. The outermost metallization layer comprises aluminum and includes at least one bond pad and at least one interconnect runner each electrically connected to an interconnect layer. An under bump metallization layer (UBM) is located over the bond pad, and a solder bump is located over the UBM.

Abstract translation: 本发明提供一种焊料凸块结构。 在一个方面，焊料凸块结构用于诸如集成电路的半导体器件中。 半导体器件包括位于半导体衬底之上的有源器件，包括形成在有源器件上的铜的互连层以及位于互连层上的最外层金属化层。 最外面的金属化层包括铝，并且包括至少一个接合焊盘和至少一个互连转子，每一个电连接到互连层。 凹凸金属化层（UBM）位于接合焊盘上方，焊料凸块位于UBM上方。

公开(公告)号：US20050269709A1

公开(公告)日：2005-12-08

申请号：US10860621

申请日：2004-06-03

Applicant: Sailesh Merchant ,  Arun Nanda ,  Nace Rossi

Inventor： Sailesh Merchant ,  Arun Nanda ,  Nace Rossi

IPC: H01L21/44 ,  H01L21/768 ,  H01L23/485

CPC classification number: H01L21/76843 ,  H01L21/76877 ,  H01L23/485 ,  H01L2924/0002 ,  H01L2924/00

Abstract: The present invention provides an interconnect structure, a method of manufacture therefor, and an integrated circuit including the same. The interconnect structure, among other elements, may include a tungsten nitride layer located within an opening in a dielectric layer, and a conductive plug located over the tungsten nitride layer and within the opening. Thus, in certain embodiments the present invention is free of a titanium/titanium nitride layer, and any defects associated with those layers.

Abstract translation: 本发明提供一种互连结构，其制造方法以及包括该互连结构的集成电路。 互连结构以及其它元件可以包括位于电介质层中的开口内的氮化钨层和位于氮化钨层上方和开口内的导电插塞。 因此，在某些实施方案中，本发明不含钛/氮化钛层，以及与这些层相关的任何缺陷。

公开(公告)号：US20050099259A1

公开(公告)日：2005-05-12

申请号：US10953475

申请日：2004-09-29

Applicant: Edward Harris ,  Sailesh Merchant ,  Kurt Steiner ,  Susan Vitkavage

Inventor： Edward Harris ,  Sailesh Merchant ,  Kurt Steiner ,  Susan Vitkavage

IPC: H01L21/768 ,  H01F41/04 ,  H01L21/02 ,  H01L21/3205 ,  H01L21/822 ,  H01L23/12 ,  H01L23/485 ,  H01L23/52 ,  H01L23/522 ,  H01L27/04 ,  H01L27/08 ,  H01F5/00

CPC classification number: H01L24/10 ,  H01F41/041 ,  H01L23/5227 ,  H01L24/13 ,  H01L27/08 ,  H01L28/10 ,  H01L2224/05001 ,  H01L2224/05027 ,  H01L2224/0508 ,  H01L2224/05124 ,  H01L2224/05166 ,  H01L2224/05181 ,  H01L2224/05184 ,  H01L2224/05572 ,  H01L2224/056 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2224/45124 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01068 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/30105 ,  H01L2924/30107 ,  Y10T29/4902 ,  H01L2924/00 ,  H01L2224/48

Abstract: An inductor formed within an integrated circuit and a method for forming the inductor. The inductor comprises an underlying layer of aluminum formed in a first metallization layer and patterned and etched into the desired shape. In one embodiment the aluminum line comprises a spiral shape. According to a damascene process, a conductive runner, preferably of copper, is formed in a dielectric layer overlying the aluminum line and in electrical contact therewith. The aluminum line and the conductive runner cooperate to form the inductor. In another embodiment the aluminum line and the conductive runner are formed in a vertically spaced-apart orientation, with tungsten plugs or conductive vias formed to provide electrical connection therebetween. A method for forming the inductor comprises forming an aluminum conductive line and forming a conductive runner over the conductive line.

Abstract translation: 在集成电路内形成的电感器和形成电感器的方法。 该电感器包括形成在第一金属化层中并被图案化并蚀刻成所需形状的铝的下层。 在一个实施例中，铝线包括螺旋形状。 根据镶嵌工艺，在覆盖铝线并且与其电接触的介电层中形成优选铜的导电流道。 铝线和导电流道配合形成电感器。 在另一个实施例中，铝线和导电流道以垂直间隔的方向形成，其中形成钨塞或导电通孔以提供电连接。 形成电感器的方法包括形成铝导线并在导线上形成导电流道。