公开(公告)号：US20200350164A1

公开(公告)日：2020-11-05

申请号：US16678115

申请日：2019-11-08

Applicant: Samsung Electronics Co., Ltd.

Inventor： Eunkyu Lee ,  Kyung-Eun Byun ,  Hyunjae Song ,  Hyeonjin Shin ,  Changhyun Kim ,  Keunwook Shin ,  Changseok Lee ,  Alum Jung

IPC: H01L21/02 ,  H01L29/16 ,  H01L29/165

Abstract: Provided are a graphene structure and a method of forming the graphene structure. The graphene structure includes a substrate and graphene on a surface of the substrate. Here, a bonding region in which a material of the substrate and carbon of the graphene are covalently bonded is formed between the surface of the substrate and the graphene.

公开(公告)号：US10757554B2

公开(公告)日：2020-08-25

申请号：US16212876

申请日：2018-12-07

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hyunsuk Min ,  Jieun Kim ,  Yunjae Lim ,  Changseok Lee ,  Sangsun Choi ,  Jaeeun Kang ,  Junho Koh ,  Jongyoub Ryu ,  Yonghyun Lim

IPC: H04W4/70 ,  H04W4/029 ,  H04W84/18

Abstract: The present disclosure relates to a sensor network, Machine Type Communication (MTC), Machine-to-Machine (M2M) communication, and technology for Internet of Things (IoT). The present disclosure may be applied to intelligent services based on the above technologies, such as smart home, smart building, smart city, smart car, connected car, health care, digital education, smart retail, security and safety services.A method of managing an electronic device is provided, which includes determining a management target device, selecting at least one measurement device based on the determined management target device, transmitting an operation command to the management target device, receiving measurement information from the at least one measurement device, and determining a state of the management target device based on the received measurement information.

公开(公告)号：US20200035602A1

公开(公告)日：2020-01-30

申请号：US16238208

申请日：2019-01-02

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seunggeol Nam ,  Hyeonjin Shin ,  Keunwook Shin ,  Changhyun Kim ,  Kyung-Eun Byun ,  Hyunjae Song ,  Eunkyu Lee ,  Changseok Lee ,  Alum Jung ,  Yeonchoo Cho

IPC: H01L23/532 ,  H01L23/528 ,  H01L23/522

Abstract: An interconnect structure and an electronic device including the interconnect structure are disclosed. The interconnect structure may include a metal interconnect having a bottom surface and two opposite side surfaces surrounded by a dielectric layer, a graphene layer on the metal interconnect, and a metal bonding layer providing interface adhesion between the metal interconnect and the graphene layer. The metal bonding layer includes a metal material.

公开(公告)号：US10539868B2

公开(公告)日：2020-01-21

申请号：US15807106

申请日：2017-11-08

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyeonjin Shin ,  Hyunjae Song ,  Seongjun Park ,  Keunwook Shin ,  Changseok Lee

IPC: G03F1/64 ,  G03F1/22 ,  G03F7/20

Abstract: A pellicle for a photomask, a reticle including the same, and an exposure apparatus for lithography are provided. The pellicle may include a pellicle membrane, and the pellicle membrane may include nanocrystalline graphene. The nanocrystalline graphene may have defects. The nanocrystalline graphene may include a plurality of nanoscale crystal grains, and the nanoscale crystal grains may include a two-dimensional (2D) carbon structure having an aromatic ring structure. The defects of the nanocrystalline graphene may include at least one of an sp3 carbon atom, an oxygen atom, a nitrogen atom, or a carbon vacancy.

公开(公告)号：US09721943B2

公开(公告)日：2017-08-01

申请号：US15052290

申请日：2016-02-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： Changseok Lee ,  Keunwook Shin ,  Hyeonjin Shin ,  Seongjun Park ,  Hyunjae Song ,  Hyangsook Lee ,  Yeonchoo Cho

IPC: H01L23/528 ,  H01L27/06

CPC classification number: H01L27/0629 ,  H01L23/53271 ,  H01L27/101 ,  H01L27/228

Abstract: A wiring structure may include at least two conductive material layers and a two-dimensional layered material layer in an interface between the at least two conductive material layers. The two-dimensional layered material layer may include a grain expander layer which causes grain size of a conductive material layer which is on the two-dimensional layered material layer to be increased. Increased grain size may result in resistance of the second conductive material layer to be reduced. As a result, the total resistance of the wiring structure may be reduced. The two-dimensional layered material layer may contribute to reducing a total thickness of the wiring structure. Thus, a low-resistance and high-performance wiring structure without an increase in a thickness thereof may be implemented.

公开(公告)号：US12180584B2

公开(公告)日：2024-12-31

申请号：US16885887

申请日：2020-05-28

Applicant: Samsung Electronics Co., Ltd. ,  UNIST (ULSAN NATIONAL INSTITUTE OF SCIENCE AND TECHNOLOGY)

Inventor： Changseok Lee ,  Hyeonsuk Shin ,  Hyeonjin Shin ,  Seokmo Hong ,  Kyungyeol Ma

IPC: C30B25/10 ,  C01B21/064 ,  C23C16/02 ,  C23C16/34 ,  C23C16/50 ,  C30B25/16 ,  C30B29/40 ,  H01L21/02 ,  H01L29/08 ,  H01L29/417

Abstract: Disclosed herein is a method of fabricating hexagonal boron nitride in which hexagonal boron nitride is epitaxially grown. A method of fabricating hexagonal boron nitride includes placing a catalytic metal in a chamber, the catalytic metal having a hexagonal crystal structure and having a lattice mismatch of 15% or less with hexagonal boron nitride (h-BN) in a chamber; and growing hexagonal boron nitride on the catalytic metal at a temperature of 800° C. or lower while supplying a nitrogen source and a boron source into the chamber.

公开(公告)号：US12131905B2

公开(公告)日：2024-10-29

申请号：US16923478

申请日：2020-07-08

Applicant: Samsung Electronics Co., Ltd.

Inventor： Keunwook Shin ,  Kyungeun Byun ,  Hyeonjin Shin ,  Soyoung Lee ,  Changseok Lee

IPC: H01L21/02 ,  C23C16/26 ,  C23C16/50 ,  H01L29/16

CPC classification number: H01L21/02527 ,  C23C16/26 ,  C23C16/50 ,  H01L21/02422 ,  H01L21/02425 ,  H01L21/0262 ,  H01L29/1606

Abstract: A graphene structure and a method of forming the graphene structure are provided. The graphene structure includes directly grown graphene that is directly grown on a surface of a substrate and has controlled surface energy.

公开(公告)号：US12103850B2

公开(公告)日：2024-10-01

申请号：US17060893

申请日：2020-10-01

Applicant: Samsung Electronics Co., Ltd.

Inventor： Van Luan Nguyen ,  Keunwook Shin ,  Hyeonjin Shin ,  Changhyun Kim ,  Changseok Lee ,  Yeonchoo Cho

IPC: B32B9/00 ,  C01B32/186

CPC classification number: C01B32/186 ,  Y10T428/30

Abstract: A method of forming graphene includes: preparing a substrate in a reaction chamber; performing a first growth process of growing a plurality of graphene aggregates apart from each other on the substrate at a first growth rate by using a reaction gas including a carbon source; and performing a second growth process of forming a graphene layer by growing the plurality of graphene aggregates at a second growth rate slower than the first growth rate by using the reaction gas including the carbon source.

公开(公告)号：US11713248B2

公开(公告)日：2023-08-01

申请号：US17138194

申请日：2020-12-30

Applicant: Samsung Electronics Co., Ltd.

Inventor： Changseok Lee ,  Changhyun Kim ,  Kyung-Eun Byun ,  Keunwook Shin ,  Hyeonjin Shin ,  Eunkyu Lee

IPC: C23C16/26 ,  C01B32/186 ,  C01B32/194 ,  C23C16/513 ,  C23C16/04 ,  C23C16/02

CPC classification number: C01B32/186 ,  C01B32/194 ,  C23C16/02 ,  C23C16/04 ,  C23C16/26 ,  C23C16/513

Abstract: A method of selectively growing graphene includes forming an ion implantation region and an ion non-implantation region by implanting ions locally into a substrate; and selectively growing graphene in the ion implantation region or the ion non-implantation region.

公开(公告)号：US11626502B2

公开(公告)日：2023-04-11

申请号：US17398363

申请日：2021-08-10

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyeonjin Shin ,  Sangwon Kim ,  Kyung-Eun Byun ,  Hyunjae Song ,  Keunwook Shin ,  Eunkyu Lee ,  Changseok Lee ,  Yeonchoo Cho ,  Taejin Choi

IPC: H01L29/45 ,  H01L29/40 ,  H01L29/15 ,  H01L27/108

Abstract: An interconnect structure for reducing a contact resistance, an electronic device including the same, and a method of manufacturing the interconnect structure are provided. The interconnect structure includes a semiconductor layer including a first region having a doping concentration greater than a doping concentration of a peripheral region of the semiconductor layer, a metal layer facing the semiconductor layer, a graphene layer between the semiconductor layer and the metal layer, and a conductive metal oxide layer between the graphene layer and the semiconductor and covering the first region.