公开(公告)号：US12183679B2

公开(公告)日：2024-12-31

申请号：US17902319

申请日：2022-09-02

Applicant: Samsung Electronics Co., Ltd. ,  UNIST (ULSAN NATIONAL INSTITUTE OF SCIENCE AND TECHNOLOGY)

Inventor： Hyeonjin Shin ,  Minhyun Lee ,  Changseok Lee ,  Hyeonsuk Shin ,  Seokmo Hong

IPC: H01L23/532 ,  H01L23/522

Abstract: An interconnect structure and an electronic apparatus including the interconnect structure are provided. The interconnect structure includes a conductive layer; a dielectric layer configured to surround at least a part of the conductive layer; and a diffusion barrier layer disposed between the conductive layer and the dielectric layer and configured to limit and/or prevent a conductive material of the conductive layer from diffusing into the dielectric layer, and at least one of the dielectric layer and the diffusion barrier layer includes a boron nitride layer of a low dielectric constant.

公开(公告)号：US12183582B2

公开(公告)日：2024-12-31

申请号：US17548997

申请日：2021-12-13

Applicant: Samsung Electronics Co., Ltd.

Inventor： Changseok Lee ,  Sangwon Kim ,  Keunwook Shin

IPC: H01L21/285 ,  H01L29/40

Abstract: A film deposition method may include preparing a non-planar substrate including a first surface, a second surface, and an inclined surface between the first surface and the second surface; depositing a film having a thickness deviation on the first surface, the second surface, and the inclined surface; and etching the film deposited on the first surface, the second surface, and the inclined surface. A height of the second surface may be different than a height of the first surface.

公开(公告)号：US11975971B2

公开(公告)日：2024-05-07

申请号：US17190852

申请日：2021-03-03

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sangwon Kim ,  Kyung-Eun Byun ,  Hyeonjin Shin ,  Eunkyu Lee ,  Changseok Lee

IPC: B32B9/00 ,  C01B32/186 ,  B82Y30/00

CPC classification number: C01B32/186 ,  B82Y30/00 ,  Y10T428/30

Abstract: A graphene manufacturing apparatus includes a reaction chamber a substrate supporter configured to structurally support a substrate inside the reaction chamber; a plasma generator configured to generate a plasma inside the reaction chamber; a first gas supply configured to supply an inert gas into the reaction chamber at a first height from an upper surface of the substrate supporter in a height direction of the reaction chamber; a second gas supply configured to supply a carbon source into the reaction chamber at a second height from the upper surface of the substrate supporter in the height direction of the reaction chamber; and a third gas supply configured to supply a reducing gas into the reaction chamber, wherein the first to third gas supply units are disposed at different heights at a third height from the upper surface of the substrate supporter in the height direction of the reaction chamber.

公开(公告)号：US20220270853A1

公开(公告)日：2022-08-25

申请号：US17523339

申请日：2021-11-10

Applicant: Samsung Electronics Co., Ltd.

Inventor： Changseok Lee ,  Keunwook Shin ,  Hyeonjin Shin

IPC: H01J37/32 ,  C23C16/505 ,  C23C16/455 ,  C23C16/458 ,  C23C16/46 ,  C23C16/34 ,  C23C16/30

Abstract: An apparatus for depositing a two-dimensional material includes a chamber, a stage provided in the chamber, a dielectric window including a first surface facing the stage and a second surface provided on a side opposite to the first surface, a planar high-frequency antenna provided on the second surface of the dielectric window, and a first gas nozzle configured to provide a source gas into the chamber, wherein an alternating current electric signal having a frequency of about 1 MHz to about 1 GHz is applied to the planar high-frequency antenna.

公开(公告)号：US11180373B2

公开(公告)日：2021-11-23

申请号：US16183146

申请日：2018-11-07

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyunjae Song ,  Keunwook Shin ,  Hyeonjin Shin ,  Changseok Lee ,  Changhyun Kim ,  Kyungeun Byun ,  Seungwon Lee ,  Eunkyu Lee

IPC: H01L23/00 ,  C01B32/186 ,  H01L23/532 ,  H01L21/285 ,  H01L21/768 ,  C23C16/26 ,  C23C16/50 ,  H01L27/24 ,  C01B32/182 ,  B82Y30/00 ,  B82Y40/00

Abstract: Provided are nanocrystalline graphene and a method of forming the nanocrystalline graphene through a plasma enhanced chemical vapor deposition process. The nanocrystalline graphene may have a ratio of carbon having an sp2 bonding structure to total carbon within the range of about 50% to 99%. In addition, the nanocrystalline graphene may include crystals having a size of about 0.5 nm to about 100 nm.

公开(公告)号：US10928723B2

公开(公告)日：2021-02-23

申请号：US16708969

申请日：2019-12-10

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyeonjin Shin ,  Hyunjae Song ,  Seongjun Park ,  Keunwook Shin ,  Changseok Lee ,  Dongwook Lee ,  Minsu Seol ,  Sangwon Kim ,  Seongjun Jeong

IPC: G03F1/64 ,  G03F1/62 ,  G03F1/22

Abstract: A pellicle for a photomask, a reticle including the same, and an exposure apparatus for lithography are provided. The pellicle may include a pellicle membrane, and the pellicle membrane may include nanocrystalline graphene. The nanocrystalline graphene may have defects. The nanocrystalline graphene may include a plurality of nanoscale crystal grains, and the nanoscale crystal grains may include a two-dimensional (2D) carbon structure having an aromatic ring structure. The defects of the nanocrystalline graphene may include at least one of an sp3 carbon atom, an oxygen atom, a nitrogen atom, or a carbon vacancy.

公开(公告)号：US10090386B2

公开(公告)日：2018-10-02

申请号：US14533802

申请日：2014-11-05

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jaeho Lee ,  Hyeonjin Shin ,  Minhyun Lee ,  Changseok Lee

IPC: H01L29/15 ,  H01L31/0256 ,  H01L29/16 ,  H01L29/78 ,  H01L29/45 ,  H01L29/778 ,  H01L29/10 ,  H01L29/165 ,  H01L21/285 ,  H01L23/485 ,  H01L29/417

Abstract: Provided are a graphene-metal bonding structure, a method of manufacturing the graphene-metal bonding structure, and a semiconductor device including the graphene-metal bonding structure. According to example embodiments, a graphene-metal bonding structure includes: a graphene layer; a metal layer on the graphene layer; and an intermediate material layer between the graphene layer and the metal layer. The intermediate material layer forms an edge-contact with the metal layer from boundary portions of a material contained in the intermediate material layer that contact the metal layer.

公开(公告)号：US12262527B2

公开(公告)日：2025-03-25

申请号：US17668004

申请日：2022-02-09

Applicant: Samsung Electronics Co., Ltd.

Inventor： Changseok Lee ,  Sangwon Kim ,  Changhyun Kim ,  Kyung-Eun Byun ,  Eunkyu Lee

IPC: H10B12/00 ,  H01L29/16 ,  H01L29/20 ,  H01L29/24 ,  H01L29/76 ,  H01L29/786

Abstract: Provided are a vertical-channel cell array transistor structure and a dynamic random-access memory (DRAM) device including the same. The vertical-channel cell array transistor structure includes a semiconductor substrate, a plurality of channels arranged in an array on the semiconductor substrate and each extending perpendicularly from the semiconductor substrate, a gate insulating layer on the plurality of channels, a plurality of word lines on the semiconductor substrate and extending in a first direction, and a two-dimensional (2D) material layer on at least one surface of each of the plurality of word lines.

公开(公告)号：US20230253320A1

公开(公告)日：2023-08-10

申请号：US18297852

申请日：2023-04-10

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyeonjin SHIN ,  Sangwon Kim ,  Kyung-Eun Byun ,  Hyunijae Song ,  Keunwook Shin ,  Eunkyu Lee ,  Changseok Lee ,  Yeonchoo Cho ,  Taejin Choi

IPC: H01L23/528 ,  H10B53/30

CPC classification number: H01L23/5283 ,  H10B53/30

Abstract: An interconnect structure for reducing a contact resistance, an electronic device including the same, and a method of manufacturing the interconnect structure are provided. The interconnect structure includes a semiconductor layer including a first region having a doping concentration greater than a doping concentration of the rest region of the semiconductor layer, a metal layer facing the semiconductor layer, a semi-metal layer between the semiconductor layer and the metal layer, and a conductive metal oxide layer between the semi-metal layer and the semiconductor and covering the first region.

公开(公告)号：US11572278B2

公开(公告)日：2023-02-07

申请号：US16675350

申请日：2019-11-06

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyeonjin Shin ,  Keunwook Shin ,  Changhyun Kim ,  Seunggeol Nam ,  Kyung-Eun Byun ,  Hyunjae Song ,  Eunkyu Lee ,  Changseok Lee ,  Alum Jung ,  Yeonchoo Cho

IPC: B32B9/00 ,  C01B32/186 ,  B82Y30/00

Abstract: A method of growing graphene includes forming a carbon monolayer on a substrate by injecting a first reaction gas into a reaction chamber, wherein the first reaction gas includes a first source including a component that is a carbon source and belongs to an electron withdrawing group, and injecting a second reaction gas including a second source into the reaction chamber, wherein the second source includes a functional group that forms a volatile structure by reacting with a component that belongs to an electron withdrawing group. Graphene may be directly grown on a surface of the substrate by repeatedly injecting the first reaction gas and the second reaction gas.