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    Method for manufacturing semiconductor device
    11.
    发明授权
    Method for manufacturing semiconductor device 有权

    公开(公告)号：US11264245B2

    公开(公告)日：2022-03-01

    申请号：US16166265

    申请日：2018-10-22

    申请人： Mitsubishi Electric Corporation

    发明人： Shinya Soneda ,  Kenji Harada ,  Yosuke Nakata

    IPC分类号： H01L21/288 ,  H01L23/00 ,  C23C18/16 ,  C23C18/31 ,  C23C18/32

    摘要： Provided is a method for manufacturing a semiconductor device that improves the reliability of the semiconductor device under thermal stress and the assembly performance of the semiconductor device in manufacturing steps. The method includes the following: forming a first electrode by depositing a first conductive film onto one main surface of a semiconductor substrate and patterning the first conductive film; forming a first metal film corresponding to a pattern of the first electrode onto the first electrode; forming a second electrode by depositing a second conductive film onto the other main surface of the semiconductor substrate; forming a second metal film thinner than the first metal film onto the second electrode; and collectively forming a third metal film onto each of the first metal film and the second metal film by electroless plating.

    Power semiconductor device and method therefor
    13.
    发明授权
    Power semiconductor device and method therefor 有权

    公开(公告)号：US09972675B1

    公开(公告)日：2018-05-15

    申请号：US15594717

    申请日：2017-05-15

    申请人： Mitsubishi Electric Corporation

    发明人： Shinya Soneda

    IPC分类号： H01L29/06 ,  H01L29/739 ,  H01L21/263 ,  H01L27/06

    CPC分类号： H01L29/0626 ,  H01L21/263 ,  H01L27/0629 ,  H01L27/0647 ,  H01L27/0727 ,  H01L29/7396

    摘要： An RC-IGBT according to the invention includes a high electric field cell formed in a region surrounded by an IGBT cell or in a region surrounded by a diode cell, and an n+ diffusion layer formed at a position opposed to the high electric field cell, the position being on a second main surface of an n− type drift layer. The high electric field cell has a higher maximum electric field intensity generated when a voltage is applied between main terminals than maximum electric field intensities of the IGBT cell, the diode cell, and a withstand voltage holding structure. Additionally, a p+ type collector layer and the high electric field cell fail to overlap with each other in a direction vertical to a first main surface of the n− type drift layer in a plane view.

    Semiconductor device
    15.
    发明授权
    Semiconductor device 有权

    公开(公告)号：US11621321B2

    公开(公告)日：2023-04-04

    申请号：US17354495

    申请日：2021-06-22

    申请人： Mitsubishi Electric Corporation

    发明人： Kazuya Konishi ,  Tetsuya Nitta ,  Tomohiro Tamaki ,  Shinya Soneda

    IPC分类号： H01L29/06 ,  H01L27/06 ,  H01L29/10 ,  H01L29/16 ,  H01L29/20 ,  H01L21/761 ,  H01L29/78 ,  H01L21/265 ,  H01L21/76 ,  H01L29/739

    摘要： According to one aspect of the present disclosure, a semiconductor device includes a substrate; a drift layer of a first conductivity type provided on the substrate; a base layer of a second conductivity type provided above the drift layer on the substrate; a source layer of the first conductivity type provided on an upper surface side of the base layer; a first electrode electrically connected to the source layer; a second electrode provided on the rear surface of the substrate; a gate electrode; a trench gate extending from an upper surface of the substrate to the drift layer; and a first bottom layer of the second conductivity type provided below the trench gate in the drift layer, wherein a first distance between a portion of the first bottom layer where an impurity concentration peaks in a thickness direction and the trench gate is larger than 1 μm.

    SEMICONDUCTOR DEVICE
    16.
    发明申请
    SEMICONDUCTOR DEVICE 有权

    公开(公告)号：US20220293777A1

    公开(公告)日：2022-09-15

    申请号：US17406003

    申请日：2021-08-18

    申请人： Mitsubishi Electric Corporation

    发明人： Koichi Nishi ,  Shinya Soneda

    IPC分类号： H01L29/739 ,  H01L29/06

    摘要： A semiconductor device includes: a semiconductor substrate including an upper surface and a lower surface opposing each other and a drift layer of a first conductivity type; a base layer of a second conductivity type; an emitter layer of the first conductivity type and a contact layer of the second conductivity type; an active trench; dummy trenches; a trench gate electrode formed in the active trench; a dummy trench gate electrode formed in each of the dummy trenches; an embedded insulating film formed on the trench gate electrode in the active trench, formed on the dummy trench gate electrode in the dummy trench, and having an upper end lower than the upper surface; and an emitter electrode contacting the emitter layer on the upper surface and an inner wall of the active trench, and contacting the contact layer on the upper surface and an inner wall of the dummy trench.

    Semiconductor device and method of manufacturing semiconductor device
    20.
    发明授权
    Semiconductor device and method of manufacturing semiconductor device 有权

    公开(公告)号：US11610882B2

    公开(公告)日：2023-03-21

    申请号：US16875457

    申请日：2020-05-15

    申请人： Mitsubishi Electric Corporation

    发明人： Hiroyuki Nakamura ,  Shinya Soneda

    IPC分类号： H01L27/07 ,  H01L27/06 ,  H01L29/06 ,  H01L29/66 ,  H01L29/739 ,  H01L29/16 ,  H01L29/20 ,  H01L29/36 ,  H01L29/08 ,  H01L29/10 ,  H01L29/861

    摘要： A semiconductor device includes a semiconductor substrate in which a first region having a freewheeling diode arranged therein, second regions having an IGBT arranged therein, and a withstand-voltage retention region surrounding the first region and the second regions in plan view are defined. The semiconductor substrate has a first main surface and a second main surface. The semiconductor substrate includes an anode layer having a first conductivity type, which is arranged in the first main surface of the first region, and a diffusion layer having the first conductivity type, which is arranged in the first main surface of the withstand-voltage retention region adjacently to the anode layer. A first trench is arranged in the first main surface on a side of the anode layer with respect to a boundary between the anode layer and the diffusion layer.