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11.发明授权公开(公告)号：US10831860B2
公开(公告)日：2020-11-10
申请号：US16158056
申请日：2018-10-11
发明人： Seyoung Kim , Hyungjun Kim , Tayfun Gokmen , Malte Rasch
IPC分类号： G06F17/16
摘要： Zero-shifting techniques in analog crosspoint arrays are provided. In one aspect, an analog array-based vector-matrix multiplication includes: a weight array connected to a reference array, each including a crossbar array having a set of conductive row wires and a set of conductive column wires intersecting the set of conductive row wires, and optimizable crosspoint devices at intersections of the set of conductive column wires and the set of conductive row wires. A method for analog array-based vector-matrix computing is also provided that includes: applying repeated voltage pulses to the crosspoint devices in the weight array until all of the crosspoint devices in the weight array converge to their own symmetry point; and copying conductance values for each crosspoint device from the weight array to the reference array.
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12.发明授权公开(公告)号：US10726895B1
公开(公告)日：2020-07-28
申请号：US16241606
申请日：2019-01-07
发明人： Seyoung Kim , Tayfun Gokmen , Hyung-Min Lee , Wilfried Haensch
IPC分类号： G06N3/063 , G06F13/18 , G11C11/00 , G11C11/56 , G11C11/16 , H01L27/22 , G11C16/28 , G11C13/00 , G11C15/00
摘要： A system, comprising: a memory that stores computer-executable components; a processor, operably coupled to the memory, that executes the computer-executable components stored in the memory, wherein the computer-executable components comprise: an expression component that expresses the read current range in an RPU as read current Iwmin and Iwmax, a constant current source component that generates a reference current I, a computing component that subtracts the reference current value within from the read current value to generate an active net current read value that is negative, positive or null; a weighting component that analyzes the active current value and assigns it to a negative, positive or null weight.
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公开(公告)号：US10672872B1
公开(公告)日：2020-06-02
申请号：US16274825
申请日：2019-02-13
发明人： ChoongHyun Lee , Injo Ok , Soon-Cheon Seo , Seyoung Kim
IPC分类号： H01L29/10 , H01L29/737 , H01L29/08 , H01L21/308 , H01L29/66 , H01L21/02 , H01L21/324 , H01L29/165
摘要： A method of forming a semiconductor structure includes forming a semiconductor layer stack over a substrate. The stack includes a collector layer of silicon (Si) providing a collector region for one or more bipolar junction transistors (BJTs), an emitter layer of Si providing an emitter region for the BJTs, a base layer of (SiGe) with a first germanium percentage (Ge %) providing a base region for the BJTs, and at least one additional layer of SiGe with a second Ge %. The method also includes forming vertical fins in the stack, and forming a germanium oxide (GeOx) layer over the vertical fins. The method further includes performing a thermal anneal to react at least a portion of the GeOx layer with SiGe having one of the first and second Ge % to form a self-alignment layer providing self-alignment for at least one contact to the base layer.
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公开(公告)号：US10541135B2
公开(公告)日：2020-01-21
申请号：US16162535
申请日：2018-10-17
发明人： Seyoung Kim , Yun Seog Lee , Devendra Sadana , Joel de Souza
IPC分类号： H01L21/02 , H01L29/78 , H01L29/16 , H01L29/08 , H01L29/20 , H01L29/227 , H01L29/267 , H01L29/66 , H01L21/306
摘要： An approach to deposit, by a self-aligning process, a layer of graphene on a gate formed on a dielectric layer on a semiconductor substrate where the gate includes a metal catalyst material. The approach includes removing a portion of the dielectric layer and a portion of the semiconductor substrate not under the gate and depositing, by a self-aligning atomic layer deposition process, a layer of a material capable of creating a source and a drain in a semiconductor device on exposed surfaces of the semiconductor substrate and the dielectric layer. The approach includes removing the layer of graphene from the gate, and, then removing a portion of the layer of the material capable of creating the source and the drain in the semiconductor device.
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15.发明申请公开(公告)号：US20190304538A1
公开(公告)日：2019-10-03
申请号：US16352230
申请日：2019-03-13
发明人： Seyoung Kim , Hyung-Min Lee , Tayfun Gokmen , Shu-Jen Han
摘要： A resistive processing unit (RPU) device includes a weight storage device to store a weight voltage which corresponds to a weight value of the RPU device, and a read transistor having a gate connected to the weight storage device, and first and second source/drain terminals connected to first and second control ports, respectively. A current source connected to the second source/drain terminal generates a fixed reference current. The read transistor generates a weight current in response to the weight voltage. A read current output from the second control port represents a signed weight value of the RPU device. A magnitude of the read current is equal to a difference between the weight current and the fixed reference current. The sign of the read current is positive when the weight current is greater than the fixed reference current, and negative when the weight current is less than the fixed reference current.
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16.发明申请公开(公告)号：US20190279093A1
公开(公告)日：2019-09-12
申请号：US16423398
申请日：2019-05-28
发明人： Tayfun Gokmen , Seyoung Kim
摘要： In some aspects, a method may include initializing a first array and a second array with a random voltage value, passing a forward pass by pulsing an input voltage value from an input of the first array and an input of the second array, and reading output voltage values at an output of the first array and an output of the second array. The method may further include passing a backward pass into the inputs of both of the first and second arrays, and reading voltage values at the inputs of the first and second arrays. The method may further include updating, with the first array, a first matrix update on the first array, updating, with the second array, a first matrix update on the second, and updating, with the second array, a second matrix update on the second array.
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公开(公告)号：US20190228823A1
公开(公告)日：2019-07-25
申请号：US16367497
申请日：2019-03-28
发明人： Tayfun Gokmen , Seyoung Kim , Hyung-Min Lee , Wooram Lee , Paul Michael Solomon
摘要： A processing unit, including a first circuit part, and a capacitor connected to the first circuit part. The capacitor is charged or discharged by the first circuit part.
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公开(公告)号：US20190181236A1
公开(公告)日：2019-06-13
申请号：US15837321
申请日：2017-12-11
发明人： Choonghyun Lee , Seyoung Kim , Injo Ok , Soon-Cheon Seo
IPC分类号： H01L29/423 , H01L29/737 , H01L21/768 , H01L29/732 , H01L29/417 , H01L29/08 , H01L29/66
摘要： A bipolar junction transistor includes a collector having a first surface on a first level and a second surface on a second level. A base is formed on the second level of the collector, and an emitter is formed on the base. A dielectric liner is formed on vertical sidewalls of the collector, the base and the emitter and over the first surface. A conductive region is formed adjacent to the base in the dielectric liner. A base contact is formed along one of the vertical sidewalls to connect to the base through the conductive region.
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公开(公告)号：US20190164756A1
公开(公告)日：2019-05-30
申请号：US16162535
申请日：2018-10-17
发明人： Seyoung Kim , Yun Seog Lee , Devendra Sadana , Joel de Souza
IPC分类号： H01L21/02 , H01L29/78 , H01L29/08 , H01L29/20 , H01L29/227 , H01L29/267 , H01L29/66 , H01L21/306
CPC分类号： H01L21/02642 , H01L21/02491 , H01L21/02527 , H01L21/02554 , H01L21/0257 , H01L21/0262 , H01L21/02645 , H01L21/30621 , H01L29/0847 , H01L29/1606 , H01L29/20 , H01L29/22 , H01L29/227 , H01L29/267 , H01L29/66462 , H01L29/66522 , H01L29/78
摘要： An approach to deposit, by a self-aligning process, a layer of graphene on a gate formed on a dielectric layer on a semiconductor substrate where the gate includes a metal catalyst material. The approach includes removing a portion of the dielectric layer and a portion of the semiconductor substrate not under the gate and depositing, by a self-aligning atomic layer deposition process, a layer of a material capable of creating a source and a drain in a semiconductor device on exposed surfaces of the semiconductor substrate and the dielectric layer. The approach includes removing the layer of graphene from the gate, and, then removing a portion of the layer of the material capable of creating the source and the drain in the semiconductor device.
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公开(公告)号：US10248907B2
公开(公告)日：2019-04-02
申请号：US14887564
申请日：2015-10-20
发明人： Tayfun Gokmen , Seyoung Kim , Yurii Vlasov
摘要： Embodiments are directed to a two-terminal resistive processing unit (RPU) having a first terminal, a second terminal and an active region. The active region effects a non-linear change in a conduction state of the active region based on at least one first encoded signal applied to the first terminal and at least one second encoded signal applied to the second terminal. The active region is configured to locally perform a data storage operation of a training methodology based at least in part on the non-linear change in the conduction state. The active region is further configured to locally perform a data processing operation of the training methodology based at least in part on the non-linear change in the conduction state.
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