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公开(公告)号:US11626395B2
公开(公告)日:2023-04-11
申请号:US17462794
申请日:2021-08-31
Applicant: Intel Corporation
Inventor: Robert L. Sankman , Pooya Tadayon , Weihua Tang , Chandra M. Jha , Zhimin Wan
Abstract: An electronic device and associated methods are disclosed. In one example, the electronic device includes a plurality of dies, a logic die coupled to the plurality of dies, and a dummy die thereon. In selected examples, the dummy die is located between the logic die and the plurality of silicon dies. In selected examples, the dummy die is attached to the logic die.
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公开(公告)号:US11127727B2
公开(公告)日:2021-09-21
申请号:US16433756
申请日:2019-06-06
Applicant: Intel Corporation
Inventor: Robert L. Sankman , Pooya Tadayon , Weihua Tang , Chandra M. Jha , Zhimin Wan
Abstract: An electronic device and associated methods are disclosed. In one example, the electronic device includes a plurality of dies, a logic die coupled to the plurality of dies, and a dummy die thereon. In selected examples, the dummy die is located between the logic die and the plurality of silicon dies. In selected examples, the dummy die is attached to the logic die.
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公开(公告)号:US20200350229A1
公开(公告)日:2020-11-05
申请号:US16398452
申请日:2019-04-30
Applicant: Intel Corporation
Inventor: Je-Young Chang , James C. Matayabas, JR. , Zhimin Wan , Kyle Arrington
IPC: H01L23/473 , H01L23/373 , H01L23/367 , H05K7/20
Abstract: An integrated circuit package includes a first die and second die above a substrate, and a vapor chamber above at least one of the first and second die. A vapor space within the vapor chamber is separated into at least a first section and a second section. The first section may be over the first die, and the second section may be over the second die, for example. The structure separating the first and second sections at least partly restricts flow of vapor between the first and second sections, thereby preventing or reducing thermal cross talk between the first and second dies. In some cases, an anisotropic thermal material is above one of the first or second die, wherein the anisotropic thermal material has substantially higher thermal conductivity in a direction of a heat sink than a thermal conductivity in a direction of a section of the vapor chamber.
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公开(公告)号:US20200303852A1
公开(公告)日:2020-09-24
申请号:US16361537
申请日:2019-03-22
Applicant: Intel Corporation
Inventor: Zhimin Wan , Steven A. Klein , Chia-Pin Chiu , Shankar Devasenathipathy
Abstract: An integrated circuit (IC) socket comprising a housing with a land side, an opposing die side, and sidewalls around a perimeter of the housing. The housing comprises a first dielectric. A plurality of socket pins extends from the land side of the housing through socket pin holes in the housing over the die side of the housing. A second dielectric is within the interstitial regions between the socket pins and sidewalls of the socket pin holes. A frame structure extends around at least a portion of the perimeter of the housing, and a mesh structure is embedded within the first dielectric. The mesh structure has plurality of mesh filaments extending between the plurality of socket pin holes and coupled to the frame structure.
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公开(公告)号:US12046536B2
公开(公告)日:2024-07-23
申请号:US16398452
申请日:2019-04-30
Applicant: Intel Corporation
Inventor: Je-Young Chang , James C. Matayabas, Jr. , Zhimin Wan , Kyle Arrington
IPC: H01L23/473 , H01L23/367 , H01L23/373 , H05K7/20
CPC classification number: H01L23/473 , H01L23/367 , H01L23/3733 , H05K7/20309 , H05K7/20327 , H05K7/20336
Abstract: An integrated circuit package includes a first die and second die above a substrate, and a vapor chamber above at least one of the first and second die. A vapor space within the vapor chamber is separated into at least a first section and a second section. The first section may be over the first die, and the second section may be over the second die, for example. The structure separating the first and second sections at least partly restricts flow of vapor between the first and second sections, thereby preventing or reducing thermal cross talk between the first and second dies. In some cases, an anisotropic thermal material is above one of the first or second die, wherein the anisotropic thermal material has substantially higher thermal conductivity in a direction of a heat sink than a thermal conductivity in a direction of a section of the vapor chamber.
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公开(公告)号:US11901262B2
公开(公告)日:2024-02-13
申请号:US16256831
申请日:2019-01-24
Applicant: Intel Corporation
Inventor: Nicholas Neal , Zhimin Wan , Shankar Devasenathipathy , Je-Young Chang
IPC: H01L23/433 , F28F19/01 , H01L21/48
CPC classification number: H01L23/4336 , F28F19/01 , H01L21/4882
Abstract: Embodiments include a cooling solution having a first array of fins, where the first array of fins extend vertically from the substrate, and where adjacent individual fins of the first array are separated from each other by a microchannel. A second array of fins extend vertically from the substrate, where a channel region is between the first array of fins and the second array of fins.
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公开(公告)号:US11894282B2
公开(公告)日:2024-02-06
申请号:US16446538
申请日:2019-06-19
Applicant: Intel Corporation
Inventor: Zhimin Wan , Sergio Antonio Chan Arguedas , Peng Li , Chandra Mohan Jha , Aravindha R. Antoniswamy , Cheng Xu , Junnan Zhao , Ying Wang
IPC: H01L23/367 , H01L23/433 , H01L23/498 , H01L23/053
CPC classification number: H01L23/3675 , H01L23/053 , H01L23/433 , H01L23/49816
Abstract: Disclosed herein are vented lids for integrated circuit (IC) packages, as well as related methods and devices. For example, in some embodiments, an IC package may include a package substrate, a lid, and a die between the package substrate and the lid. A vent may extend between the interior surface and the exterior surface of the lid, and the vent may at least partially overlap the die.
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公开(公告)号:US11502017B2
公开(公告)日:2022-11-15
申请号:US16215237
申请日:2018-12-10
Applicant: INTEL CORPORATION
Inventor: Cheng Xu , Zhimin Wan , Lingtao Liu , Yikang Deng , Junnan Zhao , Chandra Mohan Jha , Kyu-oh Lee
IPC: H01L23/367 , H01L23/538 , H01L21/48 , H01L23/00 , H01L25/065 , H01L25/00
Abstract: An integrated circuit (IC) package comprises a substrate comprising a dielectric and a thermal conduit that is embedded within the dielectric. The thermal conduit has a length that extends laterally within the dielectric from a first end to a second end. An IC die is thermally coupled to the first end of the thermal conduit. The IC die comprises an interconnect that is coupled to the first end of the thermal conduit. An integrated heat spreader comprises a lid over the IC die and at least one sidewall extending from the edge of the lid to the substrate that is thermally coupled to the second end of the thermal conduit.
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公开(公告)号:US11482471B2
公开(公告)日:2022-10-25
申请号:US16287728
申请日:2019-02-27
Applicant: Intel Corporation
Inventor: Cheng Xu , Junnan Zhao , Zhimin Wan , Ying Wang , Yikang Deng , Chong Zhang , Jiwei Sun , Zhenguo Jiang , Kyu-Oh Lee
IPC: H01L23/46 , H01L23/467 , H05K1/18 , H05K1/02 , H05K3/32 , H01L23/473 , H01L23/66 , H01L23/31
Abstract: An integrated circuit package may be formed having a heat transfer fluid chamber, wherein the heat transfer fluid chamber may be positioned to allow a heat transfer fluid to directly contact an integrated circuit device within the integrated circuit package. In one embodiment, a first surface of the integrated circuit device may be electrically attached to a first substrate. The first substrate may then may be electrically attached to a second substrate, such that the integrated circuit device is between the first substrate and the second substrate. The second substrate may include a cavity, wherein the heat transfer fluid chamber may be formed between a second surface of the integrated circuit device and the cavity of the second substrate. Thus, at least a portion of a second surface of the integrated circuit device is exposed to the heat transfer fluid which flows into the heat transfer fluid chamber.
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公开(公告)号:US11456232B2
公开(公告)日:2022-09-27
申请号:US16100406
申请日:2018-08-10
Applicant: Intel Corporation
Inventor: Zhimin Wan , Je-Young Chang , Chia-Pin Chiu , Shankar Devasenathipathy , Betsegaw Kebede Gebrehiwot , Chandra Mohan Jha
IPC: H01L23/427 , H01L25/18
Abstract: Disclosed herein are thermal assemblies for multi-chip packages (MCPs), as well as related methods and devices. For example, in some embodiments, a thermal assembly for an MCP may include a heat pipe having a ring shape.
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