Oscillation circuit and transmitter including the same
    13.
    发明授权
    Oscillation circuit and transmitter including the same 有权
    振荡电路和发射机包括相同

    公开(公告)号:US09595980B2

    公开(公告)日:2017-03-14

    申请号:US14680838

    申请日:2015-04-07

    Abstract: Provided is an oscillation circuit including a voltage adjuster adjusting a magnitude of a power supply voltage according to a digital signal, an LC tank circuit connected between first and second nodes and generating a resonance signal on a basis of the magnitude adjusted power supply voltage, and a differential amplification circuit oscillating the resonance signal or modifying an oscillation state of the resonance signal to output first and second output voltage signals to the first and second nodes, respectively.

    Abstract translation: 本发明提供一种振荡电路,其包括电压调节器,其根据数字信号调整电源电压的大小,连接在第一和第二节点之间的LC谐振电路,并且基于幅度调整的电源电压产生谐振信号;以及 差分放大电路振荡谐振信号或修改谐振信号的振荡状态,以将第一和第二输出电压信号分别输出到第一和第二节点。

    Loop filter for data converter in wireless communication system and method of implementing corresponding loop filter
    14.
    发明授权
    Loop filter for data converter in wireless communication system and method of implementing corresponding loop filter 有权
    无线通信系统中数据转换器的环路滤波器及实现相应环路滤波器的方法

    公开(公告)号:US09496890B2

    公开(公告)日:2016-11-15

    申请号:US15057793

    申请日:2016-03-01

    Abstract: Provided is a loop filter for a data converter in a wireless communication system that improves both an anti-aliasing filtering characteristic and a power consumption characteristic, the loop filter including first and third resistors sequentially connected to an input end, fourth and second resistors sequentially connected to between an inverting output end and ground, a first capacitor connected to between another end of the first resistor and one end of the fourth resistor, a second capacitor connected to between the one end of the fourth resistor and the output end, a third capacitor connected to between another end of the third resistor and the output end, and an operational amplifier, wherein an inverting end of the operational amplifier is connected to the other end of the first resistor and a non-inverting end of the operational amplifier is connected to ground to output an operational amplifier response to the output end.

    Abstract translation: 提供了一种用于无线通信系统中的数据转换器的环路滤波器,其改进了抗混叠滤波特性和功耗特性,该环路滤波器包括顺序地连接到输入端的第一和第三电阻器,第四和第二电阻器顺序地连接 连接到所述第一电阻器的另一端和所述第四电阻器的一端之间的第一电容器,连接到所述第四电阻器的一端和所述输出端之间的第二电容器,第三电容器 连接到第三电阻器的另一端和输出端之间,以及运算放大器,其中运算放大器的反相端连接到第一电阻器的另一端,并且运算放大器的非反相端连接到 接地以输出对输出端的运算放大器响应。

    Delta-sigma modulator and transmitter including the same
    20.
    发明授权
    Delta-sigma modulator and transmitter including the same 有权
    Delta-Σ调制器和发射机包括相同的

    公开(公告)号:US09014281B2

    公开(公告)日:2015-04-21

    申请号:US14011268

    申请日:2013-08-27

    CPC classification number: H04L25/4902 H03K7/08 H03M3/504 H04B14/062

    Abstract: A delta-sigma modulator and a transmitter apparatus including the same are disclosed. The delta-sigma modulator includes a first integrator, a second integrator, a first comparator configured to compare an output signal of the second integrator and a reference signal, and output a first comparison signal, a second comparator configured to compare the output signal of the second integrator and the reference signal, and output a second comparison signal, a first DAC configured to output the first signal corresponding to the first comparison signal and the second comparison signal, a second DAC configured to output the second signal corresponding to the first comparison signal and the second comparison signal, a delayer configured to generate a delayed signal that delays the first comparison signal and the second comparison signal by a predetermined time, and an output DAC configured to generate an output signal having a multi-level corresponding to the delayed signal.

    Abstract translation: 公开了一种Δ-Σ调制器及其发射机装置。 Δ-Σ调制器包括第一积分器,第二积分器,被配置为比较第二积分器的输出信号和参考信号的第一比较器,并输出第一比较信号;第二比较器,被配置为比较第二积分器的输出信号 第二积分器和参考信号,并输出第二比较信号,第一DAC被配置为输出对应于第一比较信号和第二比较信号的第一信号;第二DAC,被配置为输出对应于第一比较信号的第二信号 和第二比较信号,延迟器,被配置为产生将第一比较信号和第二比较信号延迟预定时间的延迟信号;以及输出DAC,被配置为产生具有与延迟信号相对应的多电平的输出信号 。

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