High frequency signal amplifier including balun

    公开(公告)号:US10804862B2

    公开(公告)日:2020-10-13

    申请号:US16201754

    申请日:2018-11-27

    Abstract: High frequency signal amplifier including balun is disclosed. The amplifier comprises an input terminal (Vin) through which the high frequency signal is input; a balun which is connected to the input terminal and outputs a first differential signal and a second differential signal based on the high frequency signal; a transistor (M) which is connected to the balun and outputs an amplified high frequency signal based on the first differential signal and the second differential signal; an output terminal which is connected to the transistor (M) and through which the amplified high frequency signal is acquired and the amplified high frequency signal is output. Therefore, performance of the amplifier can be enhanced.

    Method for data modulation in wireless communication system and apparatus for the same

    公开(公告)号:US10193718B2

    公开(公告)日:2019-01-29

    申请号:US15870826

    申请日:2018-01-12

    Abstract: A data modulation apparatus may comprise a S2D conversion part including a first amplifier operating based on a carrier wave signal and two transformers receiving an output signal of the first amplifier; a first switch part transferring status of input data to the first amplifier based on the input data; a differential amplification part receiving output signals of the S2D conversion part and amplifying the output signals of the S2D conversion part; a D2S conversion part receiving output signals of the differential amplification part and performing modulation on the output signals by converting the output signals to a single signal; and a second switch part transferring the output signals of the differential amplification part to the D2S conversion part based on the input data. Here, the first switch part and the second switch part may be alternately turned on and off.

    Charge pump circuit and phase-locked loop including the charge pump circuit
    4.
    发明授权
    Charge pump circuit and phase-locked loop including the charge pump circuit 有权
    电荷泵电路和锁相环包括电荷泵电路

    公开(公告)号:US09106128B2

    公开(公告)日:2015-08-11

    申请号:US14311417

    申请日:2014-06-23

    CPC classification number: H02M3/07 H03L7/0895 H03L7/0896 H03L7/0898

    Abstract: Provided is a charge pump circuit having a current mirror structure, including a first voltage controller including a plurality of first resistors and a plurality of first switches, and in response to a switching control signal corresponding to a bias current, driving the plurality of first switches to allow a current path passing through the plurality of first resistors to bypass, thereby controlling a voltage level of an output end, a second voltage controller including a plurality of second resistors and a plurality of second switches, and in response to the switching control signal, driving the plurality of second switches to allow a current path passing through the plurality of second resistors to bypass, thereby controlling a voltage level of an output end to correspond to the voltage of the output end of the first voltage controller.

    Abstract translation: 提供了具有电流镜结构的电荷泵电路,包括包括多个第一电阻器和多个第一开关的第一电压控制器,并且响应于与偏置电流相对应的开关控制信号,驱动多个第一开关 允许通过多个第一电阻器的电流路径旁路,从而控制输出端的电压电平,包括多个第二电阻器和多个第二开关的第二电压控制器,并且响应于开关控制信号 驱动所述多个第二开关以允许通过所述多个第二电阻器的电流路径旁路,由此控制输出端的电压电平对应于所述第一电压控制器的输出端的电压。

    Apparatus for controlling duty ratio of signal
    7.
    发明授权
    Apparatus for controlling duty ratio of signal 有权
    用于控制信号占空比的装置

    公开(公告)号:US08841951B2

    公开(公告)日:2014-09-23

    申请号:US14067487

    申请日:2013-10-30

    CPC classification number: H03K3/017 H03K5/1565

    Abstract: Disclosed is an apparatus for controlling a duty ratio of a signal that includes a clock control unit configured to generate a plurality of control signals based on an input signal, a half-cycle generation unit configured to generate a multiplied signal by use of the input signal and a delay signal that is obtained by delaying the input signal based on a delay control voltage, and divide the multiplied signal to generate a first division signal and a second division signal that are in inverse relation to each other, a comparator unit configured to compare a pulse width of the first division signal with a pulse width of the second division signal based on the control signal provided by the clock control unit, and output a delay control signal corresponding to a result of the comparison, and a control voltage generation unit configured to output a delay control voltage.

    Abstract translation: 公开了一种用于控制信号的占空比的装置,其包括被配置为基于输入信号生成多个控制信号的时钟控制单元,半周生成单元,被配置为通过使用输入信号生成相乘的信号 以及延迟信号,其通过基于延迟控制电压延迟所述输入信号而获得,并且将所述相乘的信号除以产生彼此成反比的第一除法信号和第二除法信号,所述比较器单元被配置为比较 基于由时钟控制单元提供的控制信号的具有第二分频信号的脉冲宽度的第一分频信号的脉冲宽度,并输出与比较结果相对应的延迟控制信号,以及控制电压生成单元配置 输出延迟控制电压。

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