公开(公告)号：US20150187886A1

公开(公告)日：2015-07-02

申请号：US14311675

申请日：2014-06-23

Applicant: Electronics and Telecommunications Research Institute

Inventor： Young Rak PARK ,  Sang Choon KO ,  Woojin CHANG ,  Jae Kyoung MUN ,  Sung-Bum BAE

IPC: H01L29/20 ,  H01L29/49 ,  H01L29/417 ,  H01L29/205

CPC classification number: H01L29/66462 ,  H01L29/2003 ,  H01L29/4175 ,  H01L29/41758 ,  H01L29/4236 ,  H01L29/66431 ,  H01L29/737 ,  H01L29/778 ,  H01L29/7786

Abstract: Provided is a nitride semiconductor device including: a substrate having through via holes; first and second nitride semiconductor layers sequentially stacked on the substrate; drain electrodes and source electrodes provided on the second nitride semiconductor layer; and an insulating pattern provided on the second nitride semiconductor layer, the insulating pattern having upper via holes provided on the drain electrodes, wherein the through via holes are extended into the first and second nitride semiconductor layers and expose a bottom of each of the source electrodes.

Abstract translation: 提供一种氮化物半导体器件，包括：具有通孔的衬底; 顺序堆叠在基板上的第一和第二氮化物半导体层; 设置在第二氮化物半导体层上的漏电极和源电极; 以及设置在所述第二氮化物半导体层上的绝缘图案，所述绝缘图案具有设置在所述漏电极上的上通孔，所述贯通通孔延伸到所述第一氮化物半导体层和所述第二氮化物半导体层中，并暴露出每个所述源电极的底部 。

公开(公告)号：US20150187599A1

公开(公告)日：2015-07-02

申请号：US14310784

申请日：2014-06-20

Applicant: Electronics and Telecommunications Research Institute

Inventor： Sang Choon KO ,  Jae Kyoung MUN ,  Woojin CHANG ,  Sung-Bum BAE ,  Young Rak PARK ,  Chi Hoon JUN ,  Seok-Hwan MOON ,  Woo-Young JANG ,  Jeong-Jin KIM ,  Hyungyu JANG ,  Je Ho NA ,  Eun Soo NAM

IPC: H01L21/321 ,  H01L21/283 ,  H01L21/02

CPC classification number: H01L21/3212 ,  H01L21/0254 ,  H01L21/283 ,  H01L21/28575 ,  H01L21/28581 ,  H01L29/2003 ,  H01L29/41766 ,  H01L29/452 ,  H01L29/66462 ,  H01L29/7786

Abstract: Provided is a method of manufacturing a nitride semiconductor device. The method includes forming a plurality of electrodes on a growth substrate on which first and second nitride semiconductor layers are sequentially stacked, forming upper metal layers on the plurality of electrodes respectively, removing the growth substrate to expose a lower surface of the first nitride semiconductor layer, and forming a third nitride semiconductor layer and a lower metal layer sequentially on the exposed lower surface of the first nitride semiconductor layer.

Abstract translation: 提供一种制造氮化物半导体器件的方法。 该方法包括在生长衬底上形成多个电极，在其上依次层叠有第一和第二氮化物半导体层，分别在多个电极上形成上部金属层，去除生长衬底以暴露第一氮化物半导体层的下表面 并且在第一氮化物半导体层的暴露的下表面上顺序地形成第三氮化物半导体层和下金属层。

公开(公告)号：US20150087142A1

公开(公告)日：2015-03-26

申请号：US14555182

申请日：2014-11-26

Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE

Inventor： Jong-Won LIM ,  Ho Kyun AHN ,  Young Rak PARK ,  Dong Min KANG ,  Woo Jin CHANG ,  Seong-il KIM ,  Sung Bum BAE ,  Sang-Heung LEE ,  Hyung Sup YOON ,  Chull Won JU ,  Jae Kyoung MUN ,  Eun Soo NAM

IPC: H01L29/66 ,  H01L21/311 ,  H01L21/28 ,  H01L29/423

CPC classification number: H01L29/66431 ,  H01L21/28255 ,  H01L21/31116 ,  H01L21/31144 ,  H01L29/1608 ,  H01L29/42316 ,  H01L29/42376 ,  H01L29/66068 ,  H01L29/7787

Abstract: Disclosed is a manufacturing method of a high electron mobility transistor. The method includes: forming a source electrode and a drain electrode on a substrate; forming a first insulating film having a first opening on an entire surface of the substrate, the first opening exposing a part of the substrate; forming a second insulating film having a second opening within the first opening, the second opening exposing a part of the substrate; forming a third insulating film having a third opening within the second opening, the third opening exposing a part of the substrate; etching a part of the first insulating film, the second insulating film and the third insulating film so as to expose the source electrode and the drain electrode; and forming a T-gate electrode on a support structure including the first insulating film, the second insulating film and the third insulating film.

Abstract translation: 公开了一种高电子迁移率晶体管的制造方法。 该方法包括：在基板上形成源电极和漏电极; 在所述基板的整个表面上形成具有第一开口的第一绝缘膜，所述第一开口暴露所述基板的一部分; 在所述第一开口内形成具有第二开口的第二绝缘膜，所述第二开口暴露所述基板的一部分; 在所述第二开口内形成具有第三开口的第三绝缘膜，所述第三开口暴露所述基板的一部分; 蚀刻第一绝缘膜，第二绝缘膜和第三绝缘膜的一部分，以使源电极和漏电极露出; 以及在包括第一绝缘膜，第二绝缘膜和第三绝缘膜的支撑结构上形成T栅电极。

公开(公告)号：US20140213045A1

公开(公告)日：2014-07-31

申请号：US14230031

申请日：2014-03-31

Applicant: Electronics and Telecommunications Research Institute

Inventor： Sung Bum BAE ,  Eun Soo NAM ,  Jae Kyoung MUN ,  Sung Bock KIM ,  Hae Cheon KIM ,  Chull Won JU ,  Sang Choon KO ,  Jong-Won LIM ,  Ho Kyun AHN ,  Woo Jin CHANG ,  Young Rak PARK

IPC: H01L29/66

CPC classification number: H01L29/66446 ,  H01L21/0242 ,  H01L21/02458 ,  H01L21/0254 ,  H01L21/02647 ,  H01L21/8252 ,  H01L27/0605 ,  H01L27/0883

Abstract: The present disclosure relates to a nitride electronic device and a method for manufacturing the same, and particularly, to a nitride electronic device and a method for manufacturing the same that can implement various types of nitride integrated structures on the same substrate through a regrowth technology (epitaxially lateral over-growth: ELOG) of a semi-insulating gallium nitride (GaN) layer used in a III-nitride semiconductor electronic device including Group III elements such as gallium (Ga), aluminum (Al) and indium (In) and nitrogen.

Abstract translation: 本发明涉及一种氮化物电子器件及其制造方法，特别涉及一种氮化物电子器件及其制造方法，该氮化物电子器件及其制造方法可以通过再生技术在同一衬底上实现各种氮化物一体化结构（ 用于包括III族元素如镓（Ga），铝（Al）和铟（In））和氮（III）的III族氮化物半导体电子器件中的半绝缘氮化镓（GaN）层的外延横向过度生长：ELOG） 。

公开(公告)号：US20140167070A1

公开(公告)日：2014-06-19

申请号：US13938324

申请日：2013-07-10

Applicant: Electronics and Telecommunications Research Institute

Inventor： Young Rak PARK ,  Sang Choon Ko ,  Byoung-Gue Min ,  Jong-Won Lim ,  Hokyun Ahn ,  Sung-Bum Bae ,  Jae Kyoung Mun ,  Eun Soo Nam

IPC: H01L29/16 ,  H01L29/66

CPC classification number: H01L29/66477 ,  H01L23/5225 ,  H01L23/5228 ,  H01L23/5329 ,  H01L23/66 ,  H01L2223/6627 ,  H01L2223/6683 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Provided are an electronic chip and a method of fabricating the same. The semiconductor chip may include a substrate, an active device integrated on the substrate, a lower interlayered insulating layer covering the resulting structure provided with the active device, a passive device provided on the lower interlayered insulating layer, an upper interlayered insulating layer covering the resulting structure provided with the passive device, and a ground electrode provided on the upper interlayered insulating layer. The upper interlayered insulating layer may be formed of a material, whose dielectric constant may be higher than that of the lower interlayered insulating layer.

Abstract translation: 提供一种电子芯片及其制造方法。 半导体芯片可以包括衬底，集成在衬底上的有源器件，覆盖所提供的有源器件的结构的下层间绝缘层，设置在下层间绝缘层上的无源器件，覆盖所得到的上层间绝缘层 设置有无源器件的结构，以及设置在上层间绝缘层上的接地电极。 上层间绝缘层可以由其介电常数可能高于下层间绝缘层的材料的材料形成。