公开(公告)号：US20250047198A1

公开(公告)日：2025-02-06

申请号：US18923432

申请日：2024-10-22

Applicant: FUJI ELECTRIC CO., LTD.

Inventor： Ryuunosuke ARAUMI ,  Ryuji YAMADA

IPC: H02M1/42 ,  H02M1/00 ,  H02M3/156

Abstract: An integrated circuit including: a first command value output circuit outputting a first command value to turn on a transistor for a first time period; an on signal output circuit outputting an on signal to turn on the transistor, in response to an inductor current decreasing to or below a predetermined value after turning-off of the transistor; a delay circuit delaying the on signal by a predetermined time period; a correction circuit generating a second command value to turn on the transistor for a second time period; a driver circuit turning on and off the transistor respectively based on the delayed on-signal and the second command value; and a second estimation circuit estimating the rectified voltage. The correction circuit corrects the first command value based on the first voltage, the estimated rectified voltage, and the predetermined time period.

公开(公告)号：US20250040161A1

公开(公告)日：2025-01-30

申请号：US18673261

申请日：2024-05-23

Applicant: FUJI ELECTRIC CO., LTD.

Inventor： Koh YOSHIKAWA

IPC: H01L29/739 ,  H01L29/06 ,  H01L29/08 ,  H01L29/40

Abstract: Provided is a semiconductor device including a portion which operates as a transistor, in which the transistor includes a gate trench portion to which a gate voltage is applied, an emitter region in contact with the gate trench portion, and a base region in contact with the gate trench portion, and a threshold voltage at which the transistor transits from an off state to an on state in an ambient temperature of 25° C. is larger than a half of a first voltage for turning on the transistor.

公开(公告)号：US20250029939A1

公开(公告)日：2025-01-23

申请号：US18677610

申请日：2024-05-29

Applicant: FUJI ELECTRIC CO., LTD.

Inventor： Motohito HORI ,  Yoshinari IKEDA

IPC: H01L23/64 ,  H01L23/373 ,  H01L25/07

Abstract: A semiconductor module includes a wiring terminal having an insulating layer, first and second conductive layers sandwiching the insulating layer therebetween, and a semiconductor module. The insulating layer has an insulating peripheral side that extends more outwardly than a conductive peripheral side of each of the first and second conductive layers. The semiconductor module includes a semiconductor chip, first and second terminals respectively electrically connected to the semiconductor chip, and a fixing part. The first and second terminals include first and second end parts having first and second contact surfaces in contact with the first and second conductive layers, respectively. The fixed part has a basal surface facing the insulating peripheral side, having a recess between the first and second end parts into which the insulating peripheral side is inserted.

公开(公告)号：US20250029928A1

公开(公告)日：2025-01-23

申请号：US18756425

申请日：2024-06-27

Applicant: FUJI ELECTRIC CO., LTD.

Inventor： Tomohiro ISONO

IPC: H01L23/538 ,  H01L23/00 ,  H01L23/495 ,  H01L25/065

Abstract: A semiconductor device includes a wiring board, a semiconductor element disposed on the wiring board, and a lead having a bonding surface that is bonded to a main electrode of the semiconductor element by a bonding material. The main electrode includes a first pad and a second pad separated by an insulating layer extending in a first direction. The lead has at the bonding surface a recess that faces the main electrode so as to overlap the insulating layer and extends in the first direction. The recess has two outer ends in the first direction, one of which overlaps one end of the lead in plan view. The recess has a bottom surface that faces the main electrode of the semiconductor element, is not in contact with the bonding material and is continuous from the one of the two outer ends thereof to another end thereof in the first direction.

公开(公告)号：US20250029916A1

公开(公告)日：2025-01-23

申请号：US18903703

申请日：2024-10-01

Applicant: FUJI ELECTRIC CO., LTD.

Inventor： Ryoichi KATO ,  Yoshinari IKEDA ,  Yuma MURATA

IPC: H01L23/522 ,  H01L23/49 ,  H01L23/498 ,  H01L25/16 ,  H01R4/02 ,  H01R43/02

Abstract: A semiconductor device includes a capacitor including a first connection terminal, a second connection terminal, and a second insulating member disposed between the first connection terminal and the second connection terminal, and a semiconductor module including a multi-layer terminal portion in which a first power terminal, a first insulating member, and a second power terminal are sequentially stacked. The first connection terminal and the second connection terminal extend to an outside, the first power terminal includes a first bonding area electrically connected to the first connection terminal, the second power terminal includes a second bonding area electrically connected to the second connection terminal, and the first insulating member includes a terrace portion extending from an end portion of the second power terminal toward the first connection terminal in a plan view of the semiconductor module.

公开(公告)号：US12205993B2

公开(公告)日：2025-01-21

申请号：US18310554

申请日：2023-05-02

Applicant: FUJI ELECTRIC CO., LTD.

Inventor： Hiroki Wakimoto ,  Hiroshi Takishita ,  Takashi Yoshimura ,  Takahiro Tamura ,  Yuichi Onozawa

IPC: H01L29/36 ,  H01L21/22 ,  H01L21/265 ,  H01L21/324 ,  H01L29/06 ,  H01L29/32 ,  H01L29/66 ,  H01L29/739 ,  H01L29/861 ,  H01L27/06

Abstract: A p-type semiconductor region is formed in a front surface side of an n-type semiconductor substrate. An n-type field stop (FS) region including protons as a donor is formed in a rear surface side of the semiconductor substrate. A concentration distribution of the donors in the FS region include first, second, third and fourth peaks in order from a front surface to the rear surface. Each of the peaks has a peak maximum point, and peak end points formed at both sides of the peak maximum point. The peak maximum points of the first and second peaks are higher than the peak maximum point of the third peak. The peak maximum point of the third peak is lower than the peak maximum point of the fourth peak.

公开(公告)号：US20250023485A1

公开(公告)日：2025-01-16

申请号：US18674928

申请日：2024-05-27

Applicant: FUJI ELECTRIC CO., LTD.

Inventor： Masashi AKAHANE

IPC: H02M7/217 ,  H02M1/00

Abstract: Provided is a circuit apparatus including a power conversion circuit, and a control circuit which controls the power conversion circuit, in which the power conversion circuit includes a control terminal to which a control signal from the control circuit is input, an output terminal from which an output signal is output to the control circuit, and a data identification unit which identifies an input data signal input to the output terminal. A first superimposed signal in which the output signal and the input data signal are superimposed on each other may be input to the data identification unit, and the data identification unit may identify the input data signal based on the first superimposed signal and the output signal.

公开(公告)号：US20250022835A1

公开(公告)日：2025-01-16

申请号：US18899692

申请日：2024-09-27

Applicant: FUJI ELECTRIC CO., LTD.

Inventor： Hideo AMI

IPC: H01L23/00 ,  H01L23/057 ,  H01L23/498 ,  H01L23/538 ,  H01L25/07

Abstract: A semiconductor module includes at least one substrate and semiconductor switching elements. The substrate includes a first electrode pattern, a second electrode pattern, and a third electrode pattern, in which the first electrode pattern is positioned between the second electrode pattern and the third electrode pattern in plan view. Each semiconductor switching element has a first surface to be joined to the first electrode pattern, and a second surface facing in an opposite direction to the first surface. On the second surface, a control electrode, a control line to be connected to the control electrode, and a main electrode including regions divided by the control line are provided. Each of the regions is electrically connected to the second electrode pattern via a first wire and is electrically connected to the third electrode pattern via a second wire. The second electrode pattern is a pattern for a principal current. The third electrode pattern is used as an auxiliary pattern for control.

公开(公告)号：US20250015793A1

公开(公告)日：2025-01-09

申请号：US18678708

申请日：2024-05-30

Applicant: FUJI ELECTRIC CO., LTD.

Inventor： Naoki SHIMIZU

IPC: H03K17/082

Abstract: A semiconductor device, including: a switch element configured to receive an input signal, and to switch on and off according to the input signal; and a protection control circuit configured to receive an operating state signal from the switch element, and to protect the switch element according to the operating state signal, the operating state signal including one of a short-circuit pulse with a first pulse width, which is generated by the switch element in a short-circuit state, or a micro short-circuit pulse with a second pulse width shorter than the first pulse width, the protection control circuit protecting the switch element upon detecting consecutive occurrences of the micro short-circuit pulse.

公开(公告)号：US20250015792A1

公开(公告)日：2025-01-09

申请号：US18678651

申请日：2024-05-30

Applicant: FUJI ELECTRIC CO., LTD.

Inventor： Isao SAITO

IPC: H03K17/082

Abstract: A semiconductor device for operating an inductive load, including: a switching element having a control terminal, a low potential terminal and a high potential terminal; a drive circuit configured to apply a control voltage to the control terminal of the switching element to switching-drive the switching element, and operate the inductive load connected to the switching element; an extracting circuit configured to extract control terminal charges from the control terminal of the switching element when the switching element makes a transition from an on state to an off state; and a voltage control circuit connected to a connection point between the low potential terminal of the switching element and the inductive load, the voltage control circuit being configured to clamp a drop in a voltage at the connection point to a predetermined voltage while the extracting circuit is extracting the control terminal charges.