公开(公告)号：US20170179095A1

公开(公告)日：2017-06-22

申请号：US15446012

申请日：2017-03-01

Applicant: FUJI ELECTRIC CO., LTD.

Inventor： Hideo AMI

IPC: H01L25/18 ,  H02M3/158 ,  H01L23/538

CPC classification number: H01L25/18 ,  H01L23/5386 ,  H01L24/48 ,  H01L25/07 ,  H01L2224/0603 ,  H01L2224/48227 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/1203 ,  H01L2924/13055 ,  H01L2924/13091 ,  H02M3/158 ,  H02M7/48 ,  H02M7/487 ,  H01L2224/45099

Abstract: A semiconductor apparatus reduces the effect of inductances and induced magnetic fields, and causes a large current to flow from one device to another device. Provided is a semiconductor apparatus comprising a first device of a first region; a second device of a second region; and a connection conductor that electrically connects the first device to the second device. The connection conductor includes current paths that are adjacent and have opposite directions in at least a portion thereof. The connection conductor causes current to flow from the first device to the second device, and causes current to flow in a direction from the second device toward the first device in at least a portion thereof.

公开(公告)号：US20250022835A1

公开(公告)日：2025-01-16

申请号：US18899692

申请日：2024-09-27

Applicant: FUJI ELECTRIC CO., LTD.

Inventor： Hideo AMI

IPC: H01L23/00 ,  H01L23/057 ,  H01L23/498 ,  H01L23/538 ,  H01L25/07

Abstract: A semiconductor module includes at least one substrate and semiconductor switching elements. The substrate includes a first electrode pattern, a second electrode pattern, and a third electrode pattern, in which the first electrode pattern is positioned between the second electrode pattern and the third electrode pattern in plan view. Each semiconductor switching element has a first surface to be joined to the first electrode pattern, and a second surface facing in an opposite direction to the first surface. On the second surface, a control electrode, a control line to be connected to the control electrode, and a main electrode including regions divided by the control line are provided. Each of the regions is electrically connected to the second electrode pattern via a first wire and is electrically connected to the third electrode pattern via a second wire. The second electrode pattern is a pattern for a principal current. The third electrode pattern is used as an auxiliary pattern for control.

公开(公告)号：US20220189930A1

公开(公告)日：2022-06-16

申请号：US17683069

申请日：2022-02-28

Applicant: FUJI ELECTRIC CO., LTD.

Inventor： Hideo AMI

IPC: H01L25/07 ,  H01L23/00

Abstract: An electric circuit in which a first switching element and a first diode element are connected in antiparallel to form an upper arm and a second semiconductor element and a second diode element are connected in antiparallel to form a lower arm, and the upper arm and the lower arm are connected in series. A gate current path in one of the upper and lower arms and a reverse recovery path in the other one of the upper and lower arms are disposed close enough and extend at least partially in parallel to each other, so as to generate mutual inductance by the reverse recovery current flowing through the reverse recovery path and the gate current flowing through the gate current path.