公开(公告)号：US09263549B2

公开(公告)日：2016-02-16

申请号：US13865478

申请日：2013-04-18

Applicant: Samsung Electronics Co., Ltd.

Inventor： Mark S. Rodder ,  Chris Bowen

IPC: H01L21/336 ,  H01L29/66 ,  H01L29/78

CPC classification number: H01L29/66537 ,  H01L29/66545 ,  H01L29/66795 ,  H01L29/785

Abstract: A method of forming a field effect transistor includes forming a punchthrough region having a first conductivity type in a substrate, forming an epitaxial layer having the first conductivity type on the substrate, patterning the epitaxial layer to form a fin that protrudes from the substrate, forming a dummy gate and gate sidewall spacers on the fin defining preliminary source and drain regions of the fin on opposite sides of the dummy gate, removing the preliminary source and drain regions of the fin, implanting second conductivity type dopant atoms into exposed portions of the substrate and the punchthrough region, and forming source and drain regions having the second conductivity type on opposite sides of the dummy gate and the gate sidewall spacers.

Abstract translation: 形成场效应晶体管的方法包括在衬底中形成具有第一导电类型的穿透区域，在衬底上形成具有第一导电类型的外延层，图案化外延层以形成从衬底突出的鳍状物，形成 翅片上的虚拟栅极和栅极侧壁间隔物，其限定了在虚拟栅极的相对侧上的鳍片的初始源极和漏极区域，去除鳍片的初始源极和漏极区域，将第二导电类型掺杂剂原子注入衬底的暴露部分 并且穿透区域，并且在伪栅极和栅极侧壁间隔物的相对侧上形成具有第二导电类型的源极和漏极区域。

公开(公告)号：US09236444B2

公开(公告)日：2016-01-12

申请号：US13947239

申请日：2013-07-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Mark S. Rodder ,  Robert C. Bowen

IPC: H01L29/66 ,  H01L29/78

CPC classification number: H01L29/66469 ,  H01L29/66795 ,  H01L29/7784 ,  H01L29/785

Abstract: Methods of fabricating quantum well field effect transistors are provided. The methods may include forming a first barrier layer including a first delta doped layer on a quantum well layer and forming a second barrier layer including a second delta doped layer selectively on a portion of the first barrier layer in a first region of the substrate. The methods may also include patterning the first and second barrier layers and the quantum well layer to form a first quantum well channel structure in the first region and patterning the first barrier layer and the quantum well layer to form a second quantum well channel structure in a second region. The methods may further include forming a gate insulating layer on the first and second quantum well channel structures of the substrate and forming a gate electrode layer on the gate insulating layer.

Abstract translation: 提供了量子阱场效应晶体管的制造方法。 所述方法可以包括在量子阱层上形成包括第一δ掺杂层的第一势垒层，并且在衬底的第一区域中在第一势垒层的一部分上选择性地形成包括第二δ掺杂层的第二阻挡层。 所述方法还可以包括图案化第一和第二阻挡层和量子阱层，以在第一区域中形成第一量子阱沟道结构，并且对第一势垒层和量子阱层进行构图以形成第二量子阱沟道结构 第二区。 该方法还可以包括在衬底的第一和第二量子阱沟道结构上形成栅极绝缘层，并在栅极绝缘层上形成栅极电极层。

公开(公告)号：US20150123215A1

公开(公告)日：2015-05-07

申请号：US14270690

申请日：2014-05-06

Applicant: Samsung Electronics Co., Ltd.

Inventor： Borna J. Obradovic ,  Jorge A. Kittl ,  Mark S. Rodder

IPC: H01L29/10 ,  H01L29/78 ,  H01L29/51 ,  H01L29/20 ,  H01L29/49

CPC classification number: H01L29/42392 ,  H01L29/78681 ,  H01L29/78696

Abstract: A field effect transistor includes a body layer comprising a crystalline semiconductor channel region therein, and a gate stack on the channel region. The gate stack includes a crystalline semiconductor gate layer, and a crystalline semiconductor gate dielectric layer between the gate layer and the channel region. Related devices and fabrication methods are also discussed.

Abstract translation: 场效应晶体管包括其中包括晶体半导体沟道区的主体层，以及沟道区上的栅叠层。 栅极堆叠包括晶体半导体栅极层和栅极层和沟道区之间的晶体半导体栅极介电层。 还讨论了相关设备和制造方法。

公开(公告)号：US20150118829A1

公开(公告)日：2015-04-30

申请号：US14480869

申请日：2014-09-09

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jorge A. Kittl ,  Mark S. Rodder

IPC: H01L21/02

CPC classification number: H01L21/02664 ,  H01L21/02488 ,  H01L21/02505 ,  H01L21/02532

Abstract: Methods of forming a semiconductor layer including germanium with low defectivity are provided. The methods may include sequentially forming a silicate glass layer, a diffusion barrier layer including nitride and an interfacial layer including oxide on a substrate. The methods may also include forming a first semiconductor layer on the interfacial layer and converting a portion of the first semiconductor layer into a second semiconductor layer having a germanium concentration therein that is higher than a germanium concentration of the first semiconductor layer.

Abstract translation: 提供了形成具有低缺陷度的锗的半导体层的方法。 所述方法可以包括依次形成硅酸盐玻璃层，包含氮化物的扩散阻挡层和在衬底上包含氧化物的界面层。 所述方法还可以包括在界面层上形成第一半导体层，并将第一半导体层的一部分转换成其锗浓度高于第一半导体层的锗浓度的第二半导体层。

公开(公告)号：US08927373B2

公开(公告)日：2015-01-06

申请号：US13801001

申请日：2013-03-13

Applicant: Samsung Electronics Co., Ltd.

Inventor： Mark S. Rodder ,  Kang-ill Seo

IPC: H01L21/336 ,  H01L21/76

CPC classification number: H01L29/41791 ,  H01L29/66795 ,  H01L29/7848

Abstract: Methods of fabricating non-planar transistors including current enhancing structures are provided. The methods may include forming first and second fin structures directly adjacent each other overlying a substrate including an isolation layer. The methods may further include forming a spacer on the isolation layer including first and second recesses exposing upper surfaces of the first and second fin structures respectively. The spacer may cover an upper surface of the isolation layer between the first and second recesses. The methods may also include forming first and second current enhancing structures contacting the first and second fin structures, respectively, in the first and second recesses.

Abstract translation: 提供了制造包括电流增强结构的非平面晶体管的方法。 所述方法可以包括形成直接相邻的第一和第二翅片结构，覆盖包括隔离层的基底。 所述方法还可以包括在隔离层上形成间隔物，其包括分别暴露第一和第二翅片结构的上表面的第一和第二凹部。 间隔件可以覆盖第一和第二凹部之间的隔离层的上表面。 所述方法还可以包括分别在第一和第二凹部中形成接触第一和第二鳍片结构的第一和第二电流增强结构。

公开(公告)号：US20140312393A1

公开(公告)日：2014-10-23

申请号：US13865478

申请日：2013-04-18

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Mark S. Rodder ,  Chris Bowen

IPC: H01L29/66 ,  H01L29/78

CPC classification number: H01L29/66537 ,  H01L29/66545 ,  H01L29/66795 ,  H01L29/785

Abstract: A method of forming a field effect transistor includes forming a punchthrough region having a first conductivity type in a substrate, forming an epitaxial layer having the first conductivity type on the substrate, patterning the epitaxial layer to form a fin that protrudes from the substrate, forming a dummy gate and gate sidewall spacers on the fin defining preliminary source and drain regions of the fin on opposite sides of the dummy gate, removing the preliminary source and drain regions of the fin, implanting second conductivity type dopant atoms into exposed portions of the substrate and the punchthrough region, and forming source and drain regions having the second conductivity type on opposite sides of the dummy gate and the gate sidewall spacers.

Abstract translation: 形成场效应晶体管的方法包括在衬底中形成具有第一导电类型的穿透区域，在衬底上形成具有第一导电类型的外延层，图案化外延层以形成从衬底突出的鳍状物，形成 翅片上的虚拟栅极和栅极侧壁间隔物，其限定了在虚拟栅极的相对侧上的鳍片的初始源极和漏极区域，去除鳍片的初始源极和漏极区域，将第二导电类型掺杂剂原子注入衬底的暴露部分 并且穿透区域，并且在伪栅极和栅极侧壁间隔物的相对侧上形成具有第二导电类型的源极和漏极区域。

公开(公告)号：US20140302645A1

公开(公告)日：2014-10-09

申请号：US13859482

申请日：2013-04-09

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Mark S. Rodder ,  Kang-ill Seo

IPC: H01L21/762 ,  H01L29/66

CPC classification number: H01L21/76243 ,  H01L21/76224 ,  H01L21/823481 ,  H01L21/823821 ,  H01L21/823878 ,  H01L27/0886 ,  H01L27/0924 ,  H01L29/66795 ,  H01L29/66803 ,  H01L29/785 ,  H01L29/78609

Abstract: Methods of forming a Field Effect Transistor (FET) are provided. The methods may include forming a region that provides enhanced oxidation under a fin-shaped FET (FinFET) body.

Abstract translation: 提供了形成场效应晶体管（FET）的方法。 所述方法可以包括形成在鳍状FET（FinFET）体下提供增强氧化的区域。