Near-field communication receiver and operating method thereof

    公开(公告)号:US12301391B2

    公开(公告)日:2025-05-13

    申请号:US17729507

    申请日:2022-04-26

    Inventor: Yunseob Song

    Abstract: Provided is a near-field communication (NFC) receiver. The NFC receiver includes at least one antenna configured to receive an amplitude modulation (AM) signal, a first analog-to-digital converter (ADC) configured to generate an in-phase (I)-sample by sampling the AM signal based on a first clock signal, a second ADC configured to generate a quadrature-phase (Q)-sample by sampling the AM signal based on a second clock signal, the second clock signal having a phase difference of 90° from the first clock signal, and processing circuitry configured to calculate a root-sum-square (RSS) value between the I-sample and the Q-sample, and detect an envelope of the AM signal by using the RSS value.

    Cover for foldable electronic device including pen holder

    公开(公告)号:US12301273B2

    公开(公告)日:2025-05-13

    申请号:US17882008

    申请日:2022-08-05

    Abstract: Disclosed is a cover for a foldable electronic device. The cover includes: a first cover portion configured to be coupled to a first housing of the electronic device, a second cover portion configured to be coupled to a second housing of the electronic device, a connecting portion provided between the first cover portion and the second cover portion and extending in a first direction, the connecting portion being configured such that the first cover portion and the second cover portion are folded to be superimposed on each other or are unfolded, and a pen holder configured to at least partially accommodate a pen and mounted on the connecting portion to be detachable.

    Semiconductor devices having supporter structures

    公开(公告)号:US12300730B2

    公开(公告)日:2025-05-13

    申请号:US18668743

    申请日:2024-05-20

    Inventor: Hoin Lee Kiseok Lee

    Abstract: A semiconductor device includes lower electrodes, a first supporter structure including first supporter patterns interconnecting the lower electrodes, wherein side surfaces of the first supporter patterns and side surfaces of the lower electrodes that are exposed by the first supporter patterns at least partially define a first open region, the first supporter patterns being spaced apart from one another, the first open region extending among the first supporter patterns in a horizontal direction, a dielectric layer covering the first supporter structure and the lower electrodes, and an upper electrode on the dielectric layer. A distance between adjacent ones of the first supporter patterns is smaller than or equal to a pitch of the lower electrodes.

    Semiconductor package and method of fabricating the same

    公开(公告)号:US12300629B2

    公开(公告)日:2025-05-13

    申请号:US18204505

    申请日:2023-06-01

    Inventor: Youngwoo Park

    Abstract: A semiconductor package is disclosed. The semiconductor package may include a substrate, a first semiconductor chip on the substrate, an inner mold layer provided on the substrate to at least partially enclose the first semiconductor chip, an inner shielding layer provided on the substrate to at least partially enclose the inner mold layer, a second semiconductor chip stack on the inner shielding layer, an outer mold layer provided on the substrate to at least partially enclose the inner shielding layer and the second semiconductor chip stack, and an outer shielding layer at least partially enclosing the outer mold layer. Each of the inner and outer shielding layers may include a conductive material, and the inner shielding layer may be electrically connected to a ground pad of the substrate.

    Semiconductor package
    117.
    发明授权

    公开(公告)号:US12300589B2

    公开(公告)日:2025-05-13

    申请号:US17405603

    申请日:2021-08-18

    Abstract: Disclosed are semiconductor packages and methods of fabricating the same. The semiconductor package comprises a first redistribution substrate and a first semiconductor device on the first redistribution substrate. The first redistribution substrate includes a first dielectric layer that includes a first hole, an under-bump that includes a first bump part in the first hole and a second bump part that protrudes from the first bump part onto the first dielectric layer, an external connection terminal on a bottom surface of the first dielectric layer and connected to the under-bump through the first hole, a wetting layer between the external connection terminal and the under-bump, and a first barrier/seed layer between the under-bump and the first dielectric layer and between the under-bump and the wetting layer.

    Nonvolatile memory devices
    118.
    发明授权

    公开(公告)号:US12300302B2

    公开(公告)日:2025-05-13

    申请号:US18581018

    申请日:2024-02-19

    Abstract: A nonvolatile memory device includes a memory cell array and a row decoder. The memory cell array includes a plurality of mats. A first cell string of first mat is connected to a plurality of first word-lines, a first bit-line and a first string selection line. A second cell string of second mat is connected to a plurality of second word-lines, a second bit-line and a second string selection line. Each of the first and second cell strings includes a ground selection transistor, memory cells, and a string selection transistor coupled in series. The row decoder applies a first voltage to a third word-line among the plurality of first and second word-lines for a first period of time in a single mat mode and to apply a second voltage to the third word-line for a second period of time longer than the first period of time in a multi-mat mode.

    Facial verification method and apparatus

    公开(公告)号:US12300025B2

    公开(公告)日:2025-05-13

    申请号:US18419874

    申请日:2024-01-23

    Abstract: A facial verification method and apparatus is disclosed. The facial verification method includes detecting a face region in an input image, determining whether the detected face region represents a partial face, in response to a determination that the detected face region represents the partial face, generating a synthesized image by combining image information of the detected face region and reference image information, performing a verification operation with respect to the synthesized image and predetermined first registration information, and indicating whether facial verification of the input image is successful based on a result of the performed verification operation.

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