公开(公告)号：US08765519B2

公开(公告)日：2014-07-01

申请号：US14083084

申请日：2013-11-18

申请人： Micron Technology, Inc.

发明人： Eugene P. Marsh ,  Timothy A. Quick ,  Stefan Uhlenbrock

IPC分类号： H01L21/00 ,  H01L21/06

CPC分类号： H01L45/144 ,  C23C16/28 ,  C23C16/305 ,  C23C16/45523 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/1616 ,  H01L45/1683

摘要： A method of forming a phase change material which having germanium and tellurium therein includes depositing a germanium-containing material over a substrate. Such material includes elemental-form germanium. A gaseous tellurium-comprising precursor is flowed to the germanium-comprising material and tellurium is removed from the gaseous precursor to react with the elemental-form germanium in the germanium-comprising material to form a germanium and tellurium-comprising compound of a phase change material over the substrate. Other implementations are disclosed.

摘要翻译： 形成其中具有锗和碲的相变材料的方法包括在基底上沉积含锗材料。 这种材料包括元素形式的锗。 将含气态碲前驱体流入含锗材料，并从气态前驱体中除去碲以与含锗材料中的元素形式的锗反应，形成含锗和碲化合物的相变材料 在基板上。 公开了其他实现。

公开(公告)号：US08765222B2

公开(公告)日：2014-07-01

申请号：US13512747

申请日：2010-12-10

申请人： Yoshikazu Ooshika ,  Tetsuya Matsuura

发明人： Yoshikazu Ooshika ,  Tetsuya Matsuura

IPC分类号： C23C16/34

CPC分类号： H01L33/325 ,  C23C16/303 ,  C23C16/45523 ,  H01L21/02458 ,  H01L21/0254 ,  H01L21/02579 ,  H01L21/0262 ,  H01L33/007

摘要： The method according to the present invention includes a first step of supplying the Group V source gas at a flow rate B1 (0

摘要翻译： 根据本发明的方法包括以流量B1（0

公开(公告)号：US20140162454A1

公开(公告)日：2014-06-12

申请号：US14183301

申请日：2014-02-18

申请人： Hitachi Kokusai Electric Inc.

发明人： Yukinao KAGA ,  Tatsuyuki SAITO ,  Masanori SAKAI ,  Takashi YOKOGAWA

IPC分类号： H01L21/3205

CPC分类号： H01L21/32051 ,  C23C16/34 ,  C23C16/45523 ,  C23C16/45574 ,  H01L21/28556 ,  H01L21/28562

摘要： Provided is a method of manufacturing a semiconductor device. The method includes (a) loading a substrate into a processing chamber; (b) starting a supply of a first processing gas into the processing chamber; (c) starting a supply of a second processing gas into the processing chamber during the supply of the first processing gas; (d) stopping the supply of the second processing gas during the supply of the first processing gas; (e) stopping the supply of the first processing gas after performing the step (d); (f) removing the first processing gas and the second processing gas remaining after performing the step (e) from the processing chamber; and (g) unloading the substrate from the processing chamber.

摘要翻译： 提供一种制造半导体器件的方法。 该方法包括（a）将衬底装载到处理室中; （b）开始向处理室供应第一处理气体; （c）在供应第一处理气体期间开始向处理室供应第二处理气体; （d）在供给第一处理气体期间停止供应第二处理气体; （e）在执行步骤（d）之后停止供应第一处理气体; （f）从处理室中除去在执行步骤（e）之后残留的第一处理气体和第二处理气体; 和（g）从处理室卸载基板。

公开(公告)号：US08726838B2

公开(公告)日：2014-05-20

申请号：US12963995

申请日：2010-12-09

申请人： Sunil Shanker ,  Tony P. Chiang ,  Chi-I Lang

发明人： Sunil Shanker ,  Tony P. Chiang ,  Chi-I Lang

IPC分类号： C23C16/50 ,  C23C16/509 ,  H01L21/3065 ,  C23C16/455 ,  C23C16/02 ,  C23C16/458 ,  H01L21/67 ,  H01J37/32

CPC分类号： H01L21/02274 ,  C23C16/0227 ,  C23C16/44 ,  C23C16/45523 ,  C23C16/45525 ,  C23C16/45536 ,  C23C16/45548 ,  C23C16/45565 ,  C23C16/45574 ,  C23C16/4586 ,  C23C16/509 ,  C23C16/5096 ,  H01J37/32091 ,  H01J37/3244 ,  H01J37/32532 ,  H01J37/32541 ,  H01J37/32568 ,  H01J37/32715 ,  H01J37/32779 ,  H01L21/3065 ,  H01L21/67069

摘要： According to various embodiments of the disclosure, an apparatus and method for enhanced deposition and etch techniques is described, including a pedestal, the pedestal having at least two electrodes embedded in the pedestal, a showerhead above the pedestal, a plasma gas source connected to the showerhead, wherein the showerhead is configured to deliver plasma gas to a processing region between the showerhead and the substrate and a power source operably connected to the showerhead and the at least two electrodes with plasma being substantially contained in an area which corresponds with one electrode of the at least two electrodes.

摘要翻译： 根据本公开的各种实施例，描述了一种用于增强沉积和蚀刻技术的装置和方法，包括基座，具有至少两个嵌入基座的电极的基座，基座上方的喷头，连接到基座的等离子体气体源 淋浴头，其中所述喷头被构造成将等离子体气体输送到所述喷头和所述基板之间的处理区域，以及电源，其可操作地连接到所述喷头和所述至少两个电极，其中等离子体基本上包含在对应于 所述至少两个电极。

公开(公告)号：US08716154B2

公开(公告)日：2014-05-06

申请号：US13251621

申请日：2011-10-03

申请人： Sidharth Bhatia ,  Paul Edward Gee ,  Shankar Venkataraman

发明人： Sidharth Bhatia ,  Paul Edward Gee ,  Shankar Venkataraman

IPC分类号： H01L21/31 ,  H01L21/02

CPC分类号： H01L21/0228 ,  C23C16/402 ,  C23C16/452 ,  C23C16/45523 ,  H01L21/02164 ,  H01L21/02219 ,  H01L21/02271 ,  H01L21/0234 ,  H01L21/28556

摘要： Aspects of the disclosure pertain to methods of depositing conformal silicon oxide multi-layers on patterned substrates. The conformal silicon oxide multi-layers are each formed by depositing multiple sub-layers. Sub-layers are deposited by flowing BIS(DIETHYLAMINO)SILANE (BDEAS) and an oxygen-containing precursor into a processing chamber such that a relatively uniform dielectric growth rate is achieved across the patterned substrate surface. A plasma treatment may follow formation of sub-layers to further improve conformality and to decrease the wet etch rate of the conformal silicon oxide multi-layer film. The deposition of conformal silicon oxide multi-layers grown according to embodiments have a reduced dependence on pattern density while still being suitable for non-sacrificial applications.

摘要翻译： 本公开的方面涉及在图案化衬底上沉积适形氧化硅多层的方法。 共形氧化硅多层各自通过沉积多个子层形成。 通过将BIS（二乙基氨基）硅烷（BDEAS）和含氧前体流入处理室来沉积子层，使得在图案化的衬底表面上实现相对均匀的介电生长速率。 等离子体处理可以随后形成亚层，以进一步改善保形性并降低保形氧化硅多层膜的湿蚀刻速率。 根据实施例生长的共形氧化硅多层的沉积对图案密度的依赖性降低，同时仍然适用于非牺牲应用。

公开(公告)号：US08642454B2

公开(公告)日：2014-02-04

申请号：US13475503

申请日：2012-05-18

申请人： Paul D. Brabant ,  Keith Chung ,  Hong He ,  Devendra K. Sadana ,  Manabu Shinriki

发明人： Paul D. Brabant ,  Keith Chung ,  Hong He ,  Devendra K. Sadana ,  Manabu Shinriki

IPC分类号： H01L21/36 ,  H01L21/20

CPC分类号： H01L21/0262 ,  C23C16/30 ,  C23C16/45523 ,  C30B25/02 ,  C30B29/52 ,  H01L21/02532 ,  H01L21/02573 ,  H01L21/02636

摘要： Cyclic deposit and etch (CDE) selective epitaxial growth employs an etch chemistry employing a combination of hydrogen chloride and a germanium-containing gas to provide selective deposition of a silicon germanium alloy at temperatures lower than 625° C. High strain epitaxial silicon germanium alloys having a germanium concentration greater than 35 atomic percent in a temperature range between 400° C. and 550° C. A high order silane having a formula of SinH2n+2, in which n is an integer greater than 3, in combination with a germanium-containing precursor gas is employed to deposit the silicon germanium alloy with thickness uniformity and at a high deposition rate during each deposition step in this temperature range. Presence of the germanium-containing gas in the etch chemistry enhances the etch rate of the deposited silicon germanium alloy material during the etch step.

摘要翻译： 循环沉积和蚀刻（CDE）选择性外延生长采用采用氯化氢和含锗气体的组合的蚀刻化学法，以在低于625℃的温度下提供硅锗合金的选择性沉积。具有 在400℃和550℃之间的温度范围内的锗浓度大于35原子％。具有式SinH2n + 2的高阶硅烷，其中n是大于3的整数，与锗 - 在该温度范围内的每个沉积步骤中，使用含有前体气体来沉积具有厚度均匀性和高沉积速率的硅锗合金。 蚀刻化学中含锗气体的存在增强了在蚀刻步骤期间沉积的硅锗合金材料的蚀刻速率。

公开(公告)号：US08563424B2

公开(公告)日：2013-10-22

申请号：US13456904

申请日：2012-04-26

申请人： Seshadri Ganguli ,  Sang-Ho Yu ,  See-Eng Phan ,  Mei Chang ,  Amit Khandelwal ,  Hyoung-Chan Ha

发明人： Seshadri Ganguli ,  Sang-Ho Yu ,  See-Eng Phan ,  Mei Chang ,  Amit Khandelwal ,  Hyoung-Chan Ha

IPC分类号： H01L21/4763 ,  H01L21/44

CPC分类号： C23C16/18 ,  C23C16/42 ,  C23C16/45523 ,  C23C16/56 ,  H01L21/0206 ,  H01L21/02063 ,  H01L21/28518 ,  H01L21/2855 ,  H01L21/28556 ,  H01L21/28562 ,  H01L21/67207 ,  H01L21/68785 ,  H01L21/76843 ,  H01L21/76846 ,  H01L21/76855 ,  H01L29/665 ,  H01L29/78

摘要： Methods for forming cobalt silicide are provided. One method for forming a cobalt silicide material includes exposing a substrate having a silicon-containing material to either a wet etch solution or a pre-clean plasma during a first step and then to a hydrogen plasma during a second step of a pre-clean process. The method further includes depositing a cobalt metal layer on the silicon-containing material by a CVD process, heating the substrate to form a first cobalt silicide layer comprising CoSi at the interface of the cobalt metal layer and the silicon-containing material during a first annealing process, removing any unreacted cobalt metal from the substrate during an etch process, and heating the substrate to form a second cobalt silicide layer comprising CoSi2 during a second annealing process.

摘要翻译： 提供了形成硅化钴的方法。 用于形成硅化钴材料的一种方法包括在第一步骤期间将具有含硅材料的衬底暴露于湿蚀刻溶液或预清洁等离子体，然后在预清洁过程的第二步骤期间暴露于氢等离子体 。 该方法还包括通过CVD工艺在含硅材料上沉积钴金属层，加热衬底以在第一退火期间在钴金属层和含硅材料的界面处形成包含CoSi的第一钴硅化物层 在蚀刻过程中从衬底去除任何未反应的钴金属，以及在第二退火过程中加热衬底以形成包含CoSi 2的第二钴硅化物层。

公开(公告)号：US20130264308A1

公开(公告)日：2013-10-10

申请号：US13439609

申请日：2012-04-04

申请人： Yu-Lung YANG ,  Ying XIAO ,  Chin-Hsiang LIN

发明人： Yu-Lung YANG ,  Ying XIAO ,  Chin-Hsiang LIN

IPC分类号： B05C11/02 ,  C03C25/68 ,  C23C14/54 ,  H05H1/24

CPC分类号： C23C16/45523 ,  C23C16/4584 ,  C23C16/46 ,  C23C16/50 ,  C23C16/52 ,  H01J37/32082 ,  H01J37/32733 ,  H01J37/3299

摘要： A chuck and a wafer supported thereon are rotated during a plasma process or a film deposition process to reduce thickness non-uniformity of a film processed or deposited on the wafer.

摘要翻译： 在等离子体处理或薄膜沉积工艺期间，支撑在其上的卡盘和晶片旋转以减小加工或沉积在晶片上的膜的厚度不均匀性。

公开(公告)号：US08492258B2

公开(公告)日：2013-07-23

申请号：US13341428

申请日：2011-12-30

申请人： Kazuhiro Harada

发明人： Kazuhiro Harada

IPC分类号： H01L21/3205 ,  H01L21/31 ,  H01L21/469 ,  H01L21/02 ,  H01L29/94

CPC分类号： H01L21/28088 ,  C23C16/34 ,  C23C16/45523 ,  C23C16/45531 ,  H01L29/495 ,  H01L29/513 ,  H01L29/517

摘要： A manufacturing method of a semiconductor device of the present invention includes the step of forming an insulating film on a substrate, and the step of forming a high dielectric constant insulating film on the insulating film, and the step of forming a titanium aluminum nitride film on the high dielectric constant insulating film, wherein in the step of forming the titanium aluminum nitride film, formation of an aluminum nitride film and formation of a titanium nitride film are alternately repeated, and at that time, the aluminum nitride film is formed firstly and/or lastly.

摘要翻译： 本发明的半导体器件的制造方法包括在基板上形成绝缘膜的步骤，以及在绝缘膜上形成高介电常数绝缘膜的步骤，以及在氮化铝上形成氮化铝膜的步骤 高介电常数绝缘膜，其中在形成氮化铝钛膜的步骤中，交替地重复形成氮化铝膜和形成氮化钛膜，此时首先形成氮化铝膜和/ 或最后。

公开(公告)号：US08466049B2

公开(公告)日：2013-06-18

申请号：US11921562

申请日：2006-07-25

申请人： Yasuhiro Inokuchi ,  Atsushi Moriya ,  Katsuhiko Yamamoto ,  Yoshiaki Hashiba ,  Takashi Yokogawa

发明人： Yasuhiro Inokuchi ,  Atsushi Moriya ,  Katsuhiko Yamamoto ,  Yoshiaki Hashiba ,  Takashi Yokogawa

IPC分类号： H01L21/20

CPC分类号： C23C16/45523 ,  C23C16/24 ,  C30B25/02 ,  C30B29/06 ,  H01L21/02381 ,  H01L21/02532 ,  H01L21/0262 ,  H01L21/02636

摘要： Disclosed is a producing method of a semiconductor device, including: loading a silicon substrate into a processing chamber, the silicon substrate having a silicon nitride film or a silicon oxide film on at least a portion of a surface thereof and a silicon surface being exposed from the surface; and alternately repeating a first introducing at least a silane-compound gas into the processing chamber and a second introducing at least etching gas a plurality of times to selectively grow an epitaxial film on the silicon surface, wherein the alternate repeating is started with the second introducing prior to the first introducing.

摘要翻译： 公开了一种半导体器件的制造方法，包括：将硅衬底装载到处理室中，所述硅衬底在其表面的至少一部分上具有氮化硅膜或氧化硅膜，并且硅表面暴露于 表面 并且交替地重复首先将至少一种硅烷化合物气体引入到所述处理室中，以及第二次引入至少蚀刻气体多次以在所述硅表面上选择性地生长外延膜，其中所述交替重复开始于所述第二引入 在第一次介绍之前。