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    High density spin-transfer torque MRAM process
    92.
    发明授权
    High density spin-transfer torque MRAM process 有权
    高密度自旋转移力矩MRAM工艺

    公开(公告)号：US08183061B2

    公开(公告)日：2012-05-22

    申请号：US12931648

    申请日：2011-02-07

    Applicant: Tom Zhong ,  Chyu-Jiuh Torng ,  Rongfu Xiao ,  Adam Zhong ,  Wai-Ming Johnson Kan ,  Daniel Liu

    Inventor： Tom Zhong ,  Chyu-Jiuh Torng ,  Rongfu Xiao ,  Adam Zhong ,  Wai-Ming Johnson Kan ,  Daniel Liu

    IPC: H01L21/441

    CPC classification number: H01L27/228 ,  H01L43/12

    Abstract: A STT-MRAM integration scheme is disclosed wherein the connection between a MTJ and CMOS metal is simplified by forming an intermediate via contact (VAC) on a CMOS landing pad, a metal (VAM) pad that contacts and covers the VAC, and a MTJ on the VAM. A dual damascene process is performed to connect BIT line metal to CMOS landing pads through VAC/VAM/MTJ stacks in a device region, and to connect BIT line connection pads to CMOS connection pads through BIT connection vias outside the device region. The VAM pad is a single layer or composite made of Ta, TaN, or other conductors which serves as a diffusion barrier, has a highly smooth surface for MTJ formation, and provides excellent selectivity with refill dielectric materials during a chemical mechanical polish process. Each VAC is from 500 to 3000 Angstroms thick to minimize additional circuit resistance and minimize etch burden.

    Abstract translation: 公开了一种STT-MRAM集成方案，其中通过在CMOS着陆焊盘，接触和覆盖VAC的金属（VAM）焊盘上形成中间通孔接触（VAC）来简化MTJ和CMOS金属之间的连接，以及MTJ 在VAM上。 执行双镶嵌工艺，通过设备区域中的VAC / VAM / MTJ堆叠将BIT线金属连接到CMOS着陆焊盘，并通过设备区域外的BIT连接通孔将BIT线连接焊盘连接到CMOS连接焊盘。 VAM焊盘是由Ta，TaN或用作扩散阻挡层的其它导体制成的单层或复合材料，具有用于MTJ形成的高度光滑的表面，并且在化学机械抛光工艺期间提供了与补充介电材料的优异选择性。 每个VAC为500至3000埃厚，以最小化额外的电路电阻并最小化蚀刻负担。

    Structure and method to fabricate high performance MTJ devices for spin-transfer torque (STT)-RAM
    93.
    发明授权
    Structure and method to fabricate high performance MTJ devices for spin-transfer torque (STT)-RAM 有权
    用于制造自旋转矩（STT）-RAM的高性能MTJ装置的结构和方法

    公开(公告)号：US08138561B2

    公开(公告)日：2012-03-20

    申请号：US12284066

    申请日：2008-09-18

    Applicant: Cheng T. Horng ,  Ru-Ying Tong ,  Chyu-Jiuh Torng ,  Po-Kang Wang ,  Robert Beach ,  Witold Kula

    Inventor： Cheng T. Horng ,  Ru-Ying Tong ,  Chyu-Jiuh Torng ,  Po-Kang Wang ,  Robert Beach ,  Witold Kula

    IPC: H01L29/82

    CPC classification number: H01L43/08 ,  B82Y25/00 ,  B82Y40/00 ,  G11C11/161 ,  G11C11/1675 ,  H01F10/3254 ,  H01F10/3259 ,  H01F10/3272 ,  H01F41/307 ,  H01L43/12

    Abstract: A STT-RAM MTJ is disclosed with a MgO tunnel barrier formed by a NOX process, a CoFeB/FeSiO/CoFeB composite free layer with a middle nanocurrent channel layer to minimize Jc0, and a Ru capping layer to enhance the spin scattering effect and increase dR/R. Good write margin is achieved by modifying the NOX process to afford a RA less than 10 ohm-μm2 and good read margin is realized with a dR/R of >100% by annealing at 330° C. or higher to form crystalline CoFeB free layers. The NCC thickness is maintained in the 6 to 10 Angstrom range to reduce Rp and avoid Fe(Si) granules from not having sufficient diameter to bridge the distance between upper and lower CoFeB layers. A FeSiO layer may be inserted below the Ru layer in the capping layer to prevent the Ru from causing a high damping constant in the upper CoFeB free layer.

    Abstract translation: 公开了一种STT-RAM MTJ，其具有通过NOX工艺形成的MgO隧道势垒，具有中间纳米通道层的CoFeB / FeSiO / CoFeB复合自由层以最小化Jc0，以及Ru覆盖层以增强自旋散射效应并增加 dR / R。 通过改变NOX工艺以获得RA小于10欧姆 - μm2的良好的写入余量，并且通过在330℃或更高温度退火以dO / R> 100％实现良好的读取余量以形成结晶CoFeB自由层 。 NCC厚度保持在6至10埃范围内以减少Rp，并避免Fe（Si）颗粒不具有足够的直径以桥接上部和下部CoFeB层之间的距离。 可以在覆盖层中的Ru层下方插入FeSiO层，以防止Ru在上部CoFeB自由层中引起高阻尼常数。

    Method of magnetic tunneling layer processes for spin-transfer torque MRAM
    94.
    发明授权
    Method of magnetic tunneling layer processes for spin-transfer torque MRAM 有权
    旋转转矩MRAM的磁隧道层工艺方法

    公开(公告)号：US08133745B2

    公开(公告)日：2012-03-13

    申请号：US11975045

    申请日：2007-10-17

    Applicant: Tom Zhong ,  Rongfu Xiao ,  Chyu-Jiuh Torng ,  Adam Zhong

    Inventor： Tom Zhong ,  Rongfu Xiao ,  Chyu-Jiuh Torng ,  Adam Zhong

    IPC: H01L21/00

    CPC classification number: H01L43/12 ,  B82Y10/00 ,  H01L27/228

    Abstract: A method for forming a MTJ in a STT-MRAM is disclosed in which the easy-axis CD is determined independently of the hard-axis CD. One approach involves two photolithography steps and two etch steps to form a post in a hard mask which is transferred through a MTJ stack of layers by a third etch process. Optionally, the third etch may stop on the tunnel barrier or in the free layer. A second embodiment involves forming a first parallel line pattern on a hard mask layer and transferring the line pattern through the MTJ stack with a first etch step. A planar insulation layer is formed adjacent to the sidewalls in the line pattern and then a second parallel line pattern is formed which is transferred by a second etch through the MTJ stack to form a post pattern. Etch end point may be controlled independently for hard-axis and easy-axis dimensions.

    Abstract translation: 公开了一种用于在STT-MRAM中形成MTJ的方法，其中容易轴CD独立于硬轴CD来确定。 一种方法涉及两个光刻步骤和两个蚀刻步骤，以在通过第三蚀刻工艺通过MTJ叠层堆叠的硬掩模中形成柱。 可选地，第三蚀刻可以在隧道势垒上或在自由层中停止。 第二实施例涉及在硬掩模层上形成第一平行线图案，并通过第一蚀刻步骤通过MTJ堆叠传送线图案。 平面绝缘层与线图案中的侧壁相邻地形成，然后形成第二平行线图案，其通过第二次蚀刻通过MTJ叠层转印以形成柱形图案。 蚀刻终点可以独立控制硬轴和易轴尺寸。

    Hard bias design for extra high density recording
    95.
    发明授权
    Hard bias design for extra high density recording 有权
    用于超高密度记录的硬偏置设计

    公开(公告)号：US08107201B2

    公开(公告)日：2012-01-31

    申请号：US12660908

    申请日：2010-03-05

    Applicant: Kunliang Zhang ,  Yun-Fei Li ,  Chyu-Jiuh Torng ,  Chen-Jung Chien

    Inventor： Kunliang Zhang ,  Yun-Fei Li ,  Chyu-Jiuh Torng ,  Chen-Jung Chien

    IPC: G11B5/39 ,  G11B5/127

    CPC classification number: B82Y25/00 ,  B82Y10/00 ,  G11B5/3912 ,  G11B5/3932 ,  G11B2005/3996

    Abstract: A hard bias structure for biasing a free layer in a MR element within a read head is comprised of a composite hard bias layer having a Co78.6Cr5.2Pt16.2/Co65Cr15Pt20 configuration. The upper Co65Cr15Pt20 layer has a larger Hc value and a thickness about 2 to 10 times greater than that of the Co78.6Cr5.2Pt16.2 layer. The hard bias structure may also include a BCC underlayer such as FeCoMo which enhances the magnetic moment of the hard bias structure. Optionally, the thickness of the Co78.6Cr5.2Pt16.2 layer is zero and the Co65Cr15Pt20 layer is formed on the BCC underlayer. The present invention also encompasses a laminated hard bias structure. The Mrt value for the hard bias structure may be optimized by adjusting the thicknesses of the BCC underlayer and CoCrPt layers. As a result, a larger process window is realized and lower asymmetry output during a read operation is achieved.

    Abstract translation: 用于偏置读取头内的MR元件中的自由层的硬偏置结构由具有Co78.6Cr5.2Pt16.2 / Co65Cr15Pt20配置的复合硬偏置层组成。 Co65Cr15Pt20上层具有较大的Hc值，厚度约为Co78.6Cr5.2Pt16.2层的2〜10倍。 硬偏压结构还可以包括诸如FeCoMo的BCC底层，其增强了硬偏压结构的磁矩。 可选地，Co78.6Cr5.2Pt16.2层的厚度为零，Co65Cr15Pt20层形成在BCC底层上。 本发明还包括层压硬偏置结构。 可以通过调整BCC底层和CoCrPt层的厚度来优化硬偏置结构的Mrt值。 结果，实现了更大的处理窗口，并且在读取操作期间实现了较低的不对称输出。

    High performance MTJ element for STT-RAM and method for making the same
    96.
    发明授权
    High performance MTJ element for STT-RAM and method for making the same 有权
    用于STT-RAM的高性能MTJ元件和制作相同的方法

    公开(公告)号：US08080432B2

    公开(公告)日：2011-12-20

    申请号：US12803190

    申请日：2010-06-21

    Applicant: Cheng T. Horng ,  Ru-Ying Tong ,  Chyu-Jiuh Torng ,  Witold Kula

    Inventor： Cheng T. Horng ,  Ru-Ying Tong ,  Chyu-Jiuh Torng ,  Witold Kula

    IPC: H01L21/00 ,  H01L21/336 ,  H01L21/461

    CPC classification number: H01L43/08 ,  B82Y25/00 ,  B82Y40/00 ,  G11C11/161 ,  H01F10/3272 ,  H01F10/329 ,  H01F10/3295 ,  H01F41/307 ,  H01L43/10 ,  H01L43/12

    Abstract: A method of forming a STT-MTJ MRAM cell that utilizes transfer of spin angular momentum as a mechanism for changing the magnetic moment direction of a free layer. The device includes an IrMn pinning layer, a SyAP pinned layer, a naturally oxidized, crystalline MgO tunneling barrier layer that is formed on an Ar-ion plasma smoothed surface of the pinned layer and, in one embodiment, a free layer that comprises an amorphous layer of Co60Fe20B20. of approximately 20 angstroms thickness formed between two crystalline layers of Fe of 3 and 6 angstroms thickness respectively. The free layer is characterized by a low Gilbert damping factor and by very strong polarizing action on conduction electrons. The resulting cell has a low critical current, a high dR/R and a plurality of such cells will exhibit a low variation of both resistance and pinned layer magnetization angular dispersion.

    Abstract translation: 形成利用自旋角动量转移的STT-MTJ MRAM单元的形成方法，作为改变自由层的磁矩方向的机构。 该器件包括形成在被钉扎层的Ar离子等离子体平滑表面上的IrMn钉扎层，SyAP钉扎层，自然氧化的结晶的MgO隧道势垒层，在一个实施例中，包含非晶态的自由层 Co60Fe20B20层。 分别在3和6埃的Fe的两个结晶层之间形成约20埃的厚度。 自由层的特征在于低吉尔伯特阻尼因子和对传导电子的非常强的偏振作用。 所得到的电池具有低临界电流，高dR / R，并且多个这样的电池将呈现电阻和钉扎层磁化角分散的低变化。

    High density spin-transfer torque MRAM process
    98.
    发明申请
    High density spin-transfer torque MRAM process 有权

    公开(公告)号：US20110129946A1

    公开(公告)日：2011-06-02

    申请号：US12931648

    申请日：2011-02-07

    Applicant: Tom Zhong ,  Chyu-Jiuh Torng ,  Rongfu Xiao ,  Adam Zhong ,  Wai-Ming Johnson Kan ,  Daniel Liu

    Inventor： Tom Zhong ,  Chyu-Jiuh Torng ,  Rongfu Xiao ,  Adam Zhong ,  Wai-Ming Johnson Kan ,  Daniel Liu

    IPC: H01L21/00

    CPC classification number: H01L27/228 ,  H01L43/12

    Abstract: A STT-MRAM integration scheme is disclosed wherein the connection between a MTJ and CMOS metal is simplified by forming an intermediate via contact (VAC) on a CMOS landing pad, a metal (VAM) pad that contacts and covers the VAC, and a MTJ on the VAM. A dual damascene process is performed to connect BIT line metal to CMOS landing pads through VAC/VAM/MTJ stacks in a device region, and to connect BIT line connection pads to CMOS connection pads through BIT connection vias outside the device region. The VAM pad is a single layer or composite made of Ta, TaN, or other conductors which serves as a diffusion barrier, has a highly smooth surface for MTJ formation, and provides excellent selectivity with refill dielectric materials during a chemical mechanical polish process. Each VAC is from 500 to 3000 Angstroms thick to minimize additional circuit resistance and minimize etch burden.

    High performance MTJ element for STT-RAM and method for making the same
    100.
    发明申请
    High performance MTJ element for STT-RAM and method for making the same 有权
    用于STT-RAM的高性能MTJ元件和制作相同的方法

    公开(公告)号：US20100261295A1

    公开(公告)日：2010-10-14

    申请号：US12803190

    申请日：2010-06-21

    Applicant: Cheng T. Horng ,  Ru-Ying Tong ,  Chyu-Jiuh Torng ,  Witold Kula

    Inventor： Cheng T. Horng ,  Ru-Ying Tong ,  Chyu-Jiuh Torng ,  Witold Kula

    IPC: H01L21/8246

    CPC classification number: H01L43/08 ,  B82Y25/00 ,  B82Y40/00 ,  G11C11/161 ,  H01F10/3272 ,  H01F10/329 ,  H01F10/3295 ,  H01F41/307 ,  H01L43/10 ,  H01L43/12

    Abstract: A method of forming a STT-MTJ MRAM cell that utilizes transfer of spin angular momentum as a mechanism for changing the magnetic moment direction of a free layer. The device includes an IrMn pinning layer, a SyAP pinned layer, a naturally oxidized, crystalline MgO tunneling barrier layer that is formed on an Ar-ion plasma smoothed surface of the pinned layer and, in one embodiment, a free layer that comprises an amorphous layer of Co60Fe20B20.of approximately 20 angstroms thickness formed between two crystalline layers of Fe of 3 and 6 angstroms thickness respectively. The free layer is characterized by a low Gilbert damping factor and by very strong polarizing action on conduction electrons. The resulting cell has a low critical current, a high dR/R and a plurality of such cells will exhibit a low variation of both resistance and pinned layer magnetization angular dispersion.

    Abstract translation: 形成利用自旋角动量转移的STT-MTJ MRAM单元的形成方法，作为改变自由层的磁矩方向的机构。 该器件包括形成在被钉扎层的Ar离子等离子体平滑表面上的IrMn钉扎层，SyAP钉扎层，自然氧化的结晶的MgO隧道势垒层，在一个实施例中，包含非晶态的自由层 分别在3和6埃厚度的Fe的两个结晶层之间形成大约20埃厚度的Co60Fe20B20的层。 自由层的特征在于低吉尔伯特阻尼因子和对传导电子的非常强的偏振作用。 所得到的电池具有低临界电流，高dR / R，并且多个这样的电池将呈现电阻和钉扎层磁化角分散的低变化。

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