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    Electronic device for configuring neural network
    2.
    发明授权
    Electronic device for configuring neural network 有权

    公开(公告)号：US12125524B2

    公开(公告)日：2024-10-22

    申请号：US18303309

    申请日：2023-04-19

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Jinseok Kim ,  Yulhwa Kim ,  Jae-Joon Kim ,  Hyungjun Kim

    IPC: G11C11/412 ,  G06N3/08 ,  G11C11/418 ,  G11C11/419

    CPC classification number: G11C11/412 ,  G06N3/08 ,  G11C11/418 ,  G11C11/419

    Abstract: Disclosed are a first memory cell, a second memory cell, and a summing circuit. The first memory cell outputs only one of a first voltage through a first bit line and a second voltage through a second bit line, based on first input data received through a first word line and a second word line and a first weight. The second memory cell outputs only one of a third voltage through the first bit line and a fourth voltage through the second bit line, based on second input data received through a third word line and a fourth word line and a second weight; and the summing circuit generates an output voltage having a level corresponding to a sum of a level of a voltage received through the first bit line and a level of a voltage received through the second bit line.

    LIGHT-EMITTING DEVICE AND ELECTRONIC APPARATUS INCLUDING THE SAME
    3.
    发明公开
    LIGHT-EMITTING DEVICE AND ELECTRONIC APPARATUS INCLUDING THE SAME 审中-公开

    公开(公告)号：US20240268138A1

    公开(公告)日：2024-08-08

    申请号：US18390268

    申请日：2023-12-20

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Sunghun Lee ,  Taekjung Kim ,  Hyungjun Kim ,  Banglin Lee ,  Shingo ISHIHARA ,  Yong Joo Lee ,  Yasushi KOISHIKAWA ,  Youngki Hong

    IPC: H10K50/12 ,  H10K50/15 ,  H10K50/16 ,  H10K50/17 ,  H10K50/18

    CPC classification number: H10K50/12 ,  H10K50/15 ,  H10K50/16 ,  H10K50/171 ,  H10K50/181 ,  H10K2101/10

    Abstract: A light-emitting device and an electronic apparatus including the same. The light-emitting device includes a first electrode, a second electrode facing the first electrode, and an interlayer arranged between the first electrode and the second electrode, the interlayer includes a first emission layer and a second emission layer, the first emission layer includes a first host and a first dopant capable of emitting a first light, the first host includes m1 hosts, m1 is an integer of 1 or more, and when m1 is 2 or more, two or more hosts are present in the first emission layer and are different from the other, the second emission layer includes a second host and a second dopant capable of emitting a second light, the second host includes m2 hosts, m2 is an integer of 1 or more, and when m2 is 2 or more, two or more hosts are present in the second emission layer and are different from the other, the first dopant includes a first transition metal, the second dopant includes a second transition metal different from the first transition metal, and Expression 1 and Expression 2 are satisfied and provided in the present specification.

    Electronic device for configuring neural network
    7.
    发明授权
    Electronic device for configuring neural network 有权

    公开(公告)号：US11790985B2

    公开(公告)日：2023-10-17

    申请号：US17723358

    申请日：2022-04-18

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Jinseok Kim ,  Yulhwa Kim ,  Jae-Joon Kim ,  Hyungjun Kim

    IPC: G11C11/412 ,  G11C11/418 ,  G11C11/419 ,  G06N3/08

    CPC classification number: G11C11/412 ,  G06N3/08 ,  G11C11/418 ,  G11C11/419

    Abstract: Disclosed are a first memory cell, a second memory cell, and an amplification circuit. The first memory cell outputs a first voltage through a first bit line or a second voltage through a second bit line, based on first input data received through a first word line and a second word line and a first weight. The second memory cell outputs a third voltage through the first bit line or a fourth voltage through the second bit line, based on second input data received through a third word line and a fourth word line and a second weight. The amplification circuit generates an output voltage having a level corresponding to a sum of a level of a voltage received through the first bit line and a level of a voltage received through the second bit line.

    Artificial neural network circuit
    10.
    发明授权
    Artificial neural network circuit 有权

    公开(公告)号：US11580368B2

    公开(公告)日：2023-02-14

    申请号：US16687599

    申请日：2019-11-18

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Jae-Joon Kim ,  Hyungjun Kim ,  Yulhwa Kim

    IPC: G06N3/00 ,  G06N3/063 ,  G11C11/54 ,  G06N3/04 ,  G11C13/00

    Abstract: Provided is an artificial neural network circuit including unit weight memory cells including weight memory devices configured to store weight data and weight pass transistors, unit threshold memory cells including a threshold memory device programmed to store a threshold and a threshold pass transistor, a weight-threshold column in which the plurality of unit weight memory cells and the plurality of unit threshold memory cells are connected, and a sense amplifier configured to receive an output signal of the weight-threshold column as an input and receive a reference voltage as another input.

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