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    SEMICONDUCTOR DEVICE
    1.
    发明申请
    SEMICONDUCTOR DEVICE 有权

    公开(公告)号：US20250133728A1

    公开(公告)日：2025-04-24

    申请号：US18825982

    申请日：2024-09-05

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Iljae Shin ,  Jinwoo Han ,  Seokhan Park ,  Sungmin Park ,  Gyuhwan Oh ,  Kiseok Lee

    IPC: H10B12/00 ,  H01L29/45

    Abstract: A semiconductor device includes a bit line, a channel, a word line and a capacitor. The bit line is disposed on a substrate, and extends in a first direction substantially perpendicular to an upper surface of the substrate. The channel at least partially surrounds a sidewall of the bit line. The word line is disposed on the substrate, and at least a portion of the word line overlaps the channel in a horizontal direction substantially parallel to the upper surface of the substrate. The capacitor is electrically connected to the channel, and at least a portion of the capacitor overlaps the channel and the word line in the horizontal direction.

    PHASE-CHANGE MEMORY DEVICES AND METHODS OF FABRICATING THE SAME
    3.
    发明申请
    PHASE-CHANGE MEMORY DEVICES AND METHODS OF FABRICATING THE SAME 有权
    相变存储器件及其制造方法

    公开(公告)号：US20140124726A1

    公开(公告)日：2014-05-08

    申请号：US14067228

    申请日：2013-10-30

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Gyuhwan Oh

    IPC: H01L45/00

    CPC classification number: H01L45/1293 ,  H01L27/2409 ,  H01L27/2463 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/126 ,  H01L45/143 ,  H01L45/144 ,  H01L45/1683

    Abstract: Provided are a phase-change memory device and a method of fabricating the same. The device may include memory cells provided at intersections of word lines and bit lines that extend along first and second directions crossing each other, and a mold layer including thermal insulating regions, such as air gaps, that may be provided between the memory cells to separate the memory cells from each other. Each of the memory cells may include a lower electrode electrically connected to the word line to have a first width in the first direction, an upper electrode electrically connected to the bit line to have a second width greater than the first width in the first direction, and a phase-change layer provided between the lower and upper electrodes to have the first width in the first direction.

    Abstract translation: 提供了一种相变存储器件及其制造方法。 该设备可以包括设置在字线和位线之间的交叉处的存储单元，其沿着彼此交叉的第一和第二方向延伸;以及模具层，其包括诸如气隙的绝热区域，其可以设置在存储单元之间以分离 存储单元彼此相交。 每个存储单元可以包括电连接到字线的下电极以在第一方向上具有第一宽度，电极与位线电连接以具有大于第一方向上的第一宽度的第二宽度的上电极， 以及设置在下电极和上电极之间以相对于第一方向具有第一宽度的相变层。

    Phase-change memory devices including thermally-isolated phase-change layers and methods of fabricating the same
    6.
    发明授权
    Phase-change memory devices including thermally-isolated phase-change layers and methods of fabricating the same 有权
    包括热隔离相变层的相变存储器件及其制造方法

    公开(公告)号：US09029828B2

    公开(公告)日：2015-05-12

    申请号：US14067228

    申请日：2013-10-30

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Gyuhwan Oh

    IPC: H01L45/00 ,  H01L27/24

    CPC classification number: H01L45/1293 ,  H01L27/2409 ,  H01L27/2463 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/126 ,  H01L45/143 ,  H01L45/144 ,  H01L45/1683

    Abstract: Provided are a phase-change memory device and a method of fabricating the same. The device may include memory cells provided at intersections of word lines and bit lines that extend along first and second directions crossing each other, and a mold layer including thermal insulating regions, such as air gaps, that may be provided between the memory cells to separate the memory cells from each other. Each of the memory cells may include a lower electrode electrically connected to the word line to have a first width in the first direction, an upper electrode electrically connected to the bit line to have a second width greater than the first width in the first direction, and a phase-change layer provided between the lower and upper electrodes to have the first width in the first direction.

    Abstract translation: 提供了一种相变存储器件及其制造方法。 该设备可以包括设置在字线和位线之间的交叉处的存储单元，其沿着彼此交叉的第一和第二方向延伸;以及模具层，其包括诸如气隙的绝热区域，其可以设置在存储单元之间以分离 存储单元彼此相交。 每个存储单元可以包括电连接到字线的下电极以在第一方向上具有第一宽度，电极与位线电连接以具有大于第一方向上的第一宽度的第二宽度的上电极， 以及设置在下电极和上电极之间以相对于第一方向具有第一宽度的相变层。

    Semiconductor device including data storage material pattern
    7.
    发明授权
    Semiconductor device including data storage material pattern 有权

    公开(公告)号：US11387410B2

    公开(公告)日：2022-07-12

    申请号：US16800123

    申请日：2020-02-25

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Jeonghee Park ,  Kwangmin Park ,  Jiho Park ,  Gyuhwan Oh ,  Jungmoo Lee ,  Hideki Horii

    IPC: H01L27/24 ,  H01L45/00

    Abstract: A semiconductor device includes a base structure comprising a semiconductor substrate, a first conductive structure disposed on the base structure, and extending in a first direction, the first conductive structure including lower layers, and at least one among the lower layers including carbon, and a data storage pattern disposed on the first conductive structure. The semiconductor device further includes an intermediate conductive pattern disposed on the data storage pattern, and including intermediate layers, at least one among the intermediate layers including carbon, a switching pattern disposed on the intermediate conductive pattern, and a switching upper electrode pattern disposed on the switching pattern, and including carbon. The semiconductor device further includes a second conductive structure disposed on the switching upper electrode pattern, and extending in a second direction intersecting the first direction, and a hole spacer disposed on a side surface of the data storage pattern.

    SEMICONDUCTOR DEVICE
    8.
    发明申请
    SEMICONDUCTOR DEVICE 有权

    公开(公告)号：US20250081514A1

    公开(公告)日：2025-03-06

    申请号：US18650251

    申请日：2024-04-30

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Gyuhwan Oh ,  Seokhan Park ,  Bowon Yoo ,  Jinwoo Han

    IPC: H01L29/78 ,  H01L29/10 ,  H10B12/00

    Abstract: A semiconductor device includes a back gate line that is on a substrate and extends in a first direction, a plurality of channel structures that are on side walls of the back gate line and spaced apart from each other in a second first direction that intersects the first direction, a word line that at least partially surrounds the plurality of channel structures, and a bit line on a lower surface of each of the plurality of channel structures, where each of the plurality of channel structures includes: a first side wall facing the word line, and a second side wall that faces the back gate line and contacts an edge of the first side wall, where the first side wall is curved, and where the second side wall is flat.

    Semiconductor memory device
    9.
    发明授权
    Semiconductor memory device 有权

    公开(公告)号：US11502132B2

    公开(公告)日：2022-11-15

    申请号：US17158287

    申请日：2021-01-26

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Jinwook Yang ,  Gyuhwan Oh ,  Junhwan Paik ,  Jiyoon Chung

    IPC: H01L27/24 ,  H01L45/00

    Abstract: A semiconductor memory device including a substrate; a first conductive line on the substrate and extending in a first direction that is parallel to an upper surface of the substrate; a second conductive line extending in a second direction that intersects the first direction; a memory cell between the conductive lines and including a lower electrode pattern, a data storage element, an intermediate electrode pattern, a switching element, and an upper electrode pattern sequentially stacked on the first conductive line; and a sidewall spacer on a side surface of the memory cell, wherein the side surface of the memory cell includes a first concave portion at a side surface of the switching element, and the sidewall spacer includes a first portion on a side surface of the upper electrode pattern, and a second portion on the first concave portion, the second portion being thicker than the first portion.

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