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公开(公告)号:US20250081514A1
公开(公告)日:2025-03-06
申请号:US18650251
申请日:2024-04-30
Applicant: Samsung Electronics Co., Ltd.
Inventor: Gyuhwan Oh , Seokhan Park , Bowon Yoo , Jinwoo Han
Abstract: A semiconductor device includes a back gate line that is on a substrate and extends in a first direction, a plurality of channel structures that are on side walls of the back gate line and spaced apart from each other in a second first direction that intersects the first direction, a word line that at least partially surrounds the plurality of channel structures, and a bit line on a lower surface of each of the plurality of channel structures, where each of the plurality of channel structures includes: a first side wall facing the word line, and a second side wall that faces the back gate line and contacts an edge of the first side wall, where the first side wall is curved, and where the second side wall is flat.
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公开(公告)号:US20240357832A1
公开(公告)日:2024-10-24
申请号:US18512331
申请日:2023-11-17
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Kiseok Lee , Jinwoo Han , Hanjin Lim
Abstract: A semiconductor device includes a bit line structures on a substrate, extending in a first direction, and being spaced apart from each other in a second direction; channels contacting upper surfaces of the bit line structures and being spaced apart from each other in the first and second directions; upper gate structures extending in the second direction and surrounding the channels disposed in the second direction, the upper gate structures being spaced apart in the first direction; and a capacitor structure including first capacitor electrodes respectively on the channels; a dielectric layer on the first capacitor electrodes, the dielectric layer including a ferroelectric material or an anti-ferroelectric material; a second capacitor electrode layer on the dielectric layer; and capacitor plate electrodes on the second capacitor electrode layer, the capacitor plate electrodes each extending in the second direction and being spaced apart from each other in the first direction.
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公开(公告)号:US20250157925A1
公开(公告)日:2025-05-15
申请号:US18675252
申请日:2024-05-28
Applicant: Samsung Electronics Co., Ltd.
Inventor: Hyungeun Choi , Jinwoo Han , Seokhan Park
IPC: H01L23/528 , H10B12/00
Abstract: A semiconductor device includes: a substrate including a memory cell region and a contact region; active layers extending in a first horizontal direction and stacked to be spaced apart from each other in a vertical direction on the memory cell region; gate electrodes disposed between the active layers, extending in a second horizontal direction, and stacked to be spaced apart from each other in the vertical direction; connecting conductive lines extending in the first horizontal direction and stacked to be spaced apart from each other in the vertical direction, on the contact region; and vertical conductive patterns extending in the vertical direction and in contact with the active layers, on the memory cell region. Each of the connecting conductive lines are disposed on the same level, among the gate electrodes, and are in contact with the gate electrodes spaced apart from each other in the first horizontal direction.
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公开(公告)号:US20250133728A1
公开(公告)日:2025-04-24
申请号:US18825982
申请日:2024-09-05
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Iljae Shin , Jinwoo Han , Seokhan Park , Sungmin Park , Gyuhwan Oh , Kiseok Lee
Abstract: A semiconductor device includes a bit line, a channel, a word line and a capacitor. The bit line is disposed on a substrate, and extends in a first direction substantially perpendicular to an upper surface of the substrate. The channel at least partially surrounds a sidewall of the bit line. The word line is disposed on the substrate, and at least a portion of the word line overlaps the channel in a horizontal direction substantially parallel to the upper surface of the substrate. The capacitor is electrically connected to the channel, and at least a portion of the capacitor overlaps the channel and the word line in the horizontal direction.
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公开(公告)号:US20250016980A1
公开(公告)日:2025-01-09
申请号:US18629799
申请日:2024-04-08
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Kiseok Lee , Bongsoo Kim , Yongkwan Kim , Jongmin Kim , Taejin Park , Chansic Yoon , Jinwoo Han
IPC: H10B12/00
Abstract: A semiconductor device includes an active array in which a plurality of active patterns are arranged on a substrate; a gate structure extending in a first direction and crossing central portions of the active patterns; a bit line structure contacting first portions of the active patterns adjacent to a first sidewall of the gate structure and extending in a second direction; and a capacitor electrically connected to a second portion of each of the active patterns adjacent to a second sidewall of the gate structure. In a plan view, an upper end portion of each of the active patterns and a lower end portion of each of the active patterns are arranged to be spaced apart in a third direction oblique with respect to the first direction. The active patterns arranged side by side in the second direction form an active column.
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公开(公告)号:US12135035B2
公开(公告)日:2024-11-05
申请号:US17959685
申请日:2022-10-04
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Woong Hwang , Hyunjoo Kim , Taesang Park , Wonsoo Kang , Jimin Kim , Keeyeon Cho , Jinwoo Han
Abstract: A motor assembly has a motor having a rotor and a stator. An impeller is connected to a rotary shaft of the rotor and a housing is disposed between the impeller and the motor and surrounding an upper side of the motor. A diffuser discharges air, which is suctioned by the impeller, along an outer surface of the housing. A heat dissipation cover covers an outer surface of the motor. The heat dissipation cover includes an inner cover spaced apart from the outer surface of the motor and forming an inside-cover flow channel that air flows through and an outer cover having a diameter greater than that of the inner cover and forming an outside-cover flow channel through which air flows along the outer surface thereof.
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公开(公告)号:US20240404947A1
公开(公告)日:2024-12-05
申请号:US18673201
申请日:2024-05-23
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Kiseok Lee , Hanjin Lim , Jinwoo Han
IPC: H01L23/528 , H10B12/00
Abstract: A semiconductor device includes: cell transistors stacked in a first direction perpendicular to an upper surface of a base, wherein each cell transistor includes a first source/drain region, a second source/drain region, and a gate electrode, a bit line extending in the first direction and electrically connected to the first source/drain regions; and data storage structures electrically connected to the second source/drain regions, wherein each gate electrode has a line shape extending in a second direction parallel to the upper surface, each data storage structure includes a first electrode, a second electrode, and a dielectric layer between the first and second electrodes, wherein the first electrodes are electrically connected to the second source/drain regions, wherein the second electrodes are stacked and spaced apart from each other in the first direction, and wherein each second electrode includes a line portion having a line shape extending in the second direction.
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公开(公告)号:US20240357801A1
公开(公告)日:2024-10-24
申请号:US18530342
申请日:2023-12-06
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Hanjin Lim , Jinwoo Han , Kiseok Lee , Keunnam Kim , Seokhan Park , Moonyoung Jeong
CPC classification number: H10B12/482 , H01L29/40111 , H01L29/516 , H10B12/315 , H10B12/488 , H10B12/50
Abstract: A semiconductor memory device includes a bit line extending in a first direction, an active pattern on the bit line, the active pattern including first and second vertical portions facing each other in the first direction and a horizontal portion connecting the first and second vertical portions, first and second word lines on the horizontal portion between the first and second vertical portions, the first and second word lines extending in a second direction crossing the first direction, a gate insulating pattern between the first and second word lines and the active pattern, and a capacitor connected to each of the first and second vertical portions, the capacitor including a first electrode pattern connected to one of the first and second vertical portions, a second electrode pattern on the first electrode pattern, and a ferroelectric pattern between the first electrode pattern and the second electrode pattern.
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公开(公告)号:US12100994B2
公开(公告)日:2024-09-24
申请号:US16951535
申请日:2020-11-18
Applicant: Samsung Electronics Co., Ltd.
Inventor: Jinwoo Cho , Wonsoo Kang , Jimin Kim , Keeyeon Cho , Jinwoo Han , Woong Hwang
IPC: H02K1/27 , H02K1/2733 , H02K3/52 , H02K21/16
CPC classification number: H02K1/2733 , H02K2213/03
Abstract: A brushless direct current (BLDC) motor includes a rotor having a cylindrical permanent magnet to which a shaft is centrally coupled, and supported to rotate on the shaft. An annular stator surrounds the rotor and includes a plurality of teeth and a wound coil to generate an electromagnetic field. The permanent magnet includes a stress reducing portion, which is provided at opposite end portions thereof, and which has a shape having a mass or a volume which is smaller than a mass or a volume per unit length in an axial direction of a portion of the permanent magnet other than the opposite end portions, to reduce centrifugal stress caused by spinning of the rotor.
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公开(公告)号:US11606001B2
公开(公告)日:2023-03-14
申请号:US16716887
申请日:2019-12-17
Applicant: Samsung Electronics Co., Ltd.
Inventor: Sangmo Shin , Wonsoo Kang , Jimin Kim , Taesang Park , Jihoon Han , Jinwoo Han , Woong Hwang
IPC: H02K1/14 , H02K3/34 , H02K3/52 , H02K15/095 , H02K15/10 , A47L9/22 , H02K5/24 , A47L9/28 , A47L5/28
Abstract: A motor is provided that reduces noise and vibration, and a method is provided for manufacturing the motor and a cleaner having the motor. The motor includes a stator including a plurality of teeth that are spaced apart from each other in a predetermined interval in a circumferential direction and a coil that is wound around the plurality of teeth, a rotor that is disposed inside the stator, and a cage that is disposed in at least one of a plurality of slots that are formed between the plurality of teeth. The cage is configured to include a flow path to inject a bonding agent into at least one slot.
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