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    Optimization of low density parity-check code encoder based on a search for an independent set of nodes
    3.
    发明授权
    Optimization of low density parity-check code encoder based on a search for an independent set of nodes 有权

    公开(公告)号：US10033407B2

    公开(公告)日：2018-07-24

    申请号：US15431559

    申请日：2017-02-13

    申请人： SK Hynix Inc.

    发明人： Aman Bhatia ,  Wei-Hao Yuan ,  Yi-Min Lin ,  Naveen Kumar ,  Fan Zhang ,  Johnson Yen

    IPC分类号： H03M13/00 ,  H03M13/11 ,  G06F11/10

    摘要： Techniques are described for optimizing a parity-check matrix for a low density parity check (LDPC) encoder. In an example, a first parity-check matrix is accessed. Based on a set of rules, an independent set of check nodes and variable nodes is determined. The set of rules specifies that a check node associated with the first parity-check matrix belongs to the independent set when the check node is connected to only one variable node from the independent set. The set of rules further specifies that a variable node associated with the first parity-check matrix belongs to the independent set when the variable node is connected to only one check node from the independent set. A size of the independent set is based on the set of rules. A second parity-check matrix is generated by at least applying a permutation to the first parity-check matrix based on the independent set.

    Efficient LDPC encoder for irregular code
    4.
    发明授权
    Efficient LDPC encoder for irregular code 有权

    公开(公告)号：US10382064B2

    公开(公告)日：2019-08-13

    申请号：US15018682

    申请日：2016-02-08

    申请人： SK Hynix Inc.

    发明人： Wei-Hao Yuan ,  Lingqi Zeng ,  Aman Bhatia ,  Johnson Yen

    IPC分类号： H04L1/00 ,  H03M13/29 ,  G06F11/10 ,  G11C29/52 ,  H03M13/11 ,  H03M13/00 ,  G11C29/04

    摘要： A first memory location stores circulant contents of portions A, C, E, and B of a parity check matrix H. A second memory location stores circulant column counts of the portions A, C, E, and B. A third memory location stores a dense matrix equal to (ET−1B+D)−1, where T is an identity matrix and D and T are also portions of the parity check matrix H. First and second parity information is generated in response to receiving information data. Generating the first and second parity information includes accessing the circular content of the portions A, C, E, and B of a parity check matrix H and accessing the circulant column counts of the portions A, C, E, and B.

    Efficient buffer allocation for NAND write-path system
    5.
    发明授权
    Efficient buffer allocation for NAND write-path system 有权

    公开(公告)号：US10114742B1

    公开(公告)日：2018-10-30

    申请号：US14839831

    申请日：2015-08-28

    申请人： SK hynix Inc.

    发明人： Wei-Hao Yuan ,  Chun Hok Ho ,  Johnson Yen

    IPC分类号： G06F12/00 ,  G06F12/02 ,  G06F12/06

    摘要： A first write data and a second write data destined for a first solid state storage channel and a second solid state storage channel, respectively, is received. The first write data is chopped using a chopping factor in order to obtain (1) a first piece of chopped write data destined for the first solid state storage channel and (2) a second piece of chopped write data destined for the first solid state storage channel. The second write data is chopped using the chopping factor in order to obtain (1) a third piece of chopped write data destined for the second solid state storage channel and (2) a fourth piece of chopped write data destined for the second solid state storage channel.