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    MICROPHONE SYSTEM TO CONTROL INTERMODULATION PRODUCTS
    1.
    发明申请
    MICROPHONE SYSTEM TO CONTROL INTERMODULATION PRODUCTS 审中-公开
    麦克风系统控制互动产品

    公开(公告)号：US20140254810A1

    公开(公告)日：2014-09-11

    申请号：US13788810

    申请日：2013-03-07

    Applicant: QUALCOMM Incorporated

    Inventor： Victor A. Abramsky ,  Andrzej Partyka ,  Robert P. Gilmore

    IPC: H04R3/00

    CPC classification number: H04R3/00 ,  H04B5/06 ,  H04R2410/00 ,  H04R2420/07

    Abstract: In a particular embodiment, a system includes a controller configured to receive proximity data associated with a first device of a plurality of devices. The proximity data indicates a relative location of each of one or more devices of the plurality of devices with respect to the first device. The controller is further configured to determine an estimated intermodulation product. The estimated intermodulation product is calculated based on the proximity data. The controller is further configured to initiate transmission of one or more commands, based on the estimated intermodulation product, to at least one device of the plurality of devices.

    Abstract translation: 在特定实施例中，系统包括被配置为接收与多个设备中的第一设备相关联的接近度数据的控制器。 邻近数据指示多个设备中的一个或多个设备中的每一个相对于第一设备的相对位置。 控制器还被配置为确定估计的互调产物。 基于邻近数据计算估计的互调乘积。 控制器还被配置为基于估计的互调产物来发起对多个设备中的至少一个设备的一个或多个命令的发送。

    HARD MACRO HAVING BLOCKAGE SITES, INTEGRATED CIRCUIT INCLUDING SAME AND METHOD OF ROUTING THROUGH A HARD MACRO
    2.
    发明申请
    HARD MACRO HAVING BLOCKAGE SITES, INTEGRATED CIRCUIT INCLUDING SAME AND METHOD OF ROUTING THROUGH A HARD MACRO 审中-公开
    具有闭塞位置的硬件，包括其的集成电路和通过硬盘驱动器路由的方法

    公开(公告)号：US20140131885A1

    公开(公告)日：2014-05-15

    申请号：US13753193

    申请日：2013-01-29

    Applicant: QUALCOMM INCORPORATED

    Inventor： Kambiz Samadi ,  Shreepad A. Panth ,  Yang Du ,  Robert P. Gilmore

    IPC: H01L23/498 ,  H01L21/768

    CPC classification number: H01L23/49827 ,  G06F17/5068 ,  H01L21/76802 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: A hard macro includes a periphery defining a hard macro area and having a top and a bottom and a hard macro thickness from the top to the bottom, the hard macro including a plurality of vias extending through the hard macro thickness from the top to bottom. Also an integrated circuit having a top layer, a bottom layer and at least one middle layer, the top layer including a top layer conductive trace, the middle layer including a hard macro and the bottom layer including a bottom layer conductive trace, wherein the top layer conductive trace is connected to the bottom layer conductive trace by a via extending through the hard macro.

    Abstract translation: 硬宏包括限定硬宏区域并具有顶部和底部以及从顶部到底部的宏宏厚度的周边，硬宏包括从顶部到底部延伸穿过硬宏厚度的多个通孔。 还有一种具有顶层，底层和至少一个中间层的集成电路，顶层包括顶层导电迹线，中间层包括硬宏，底层包括底层导电迹线，其中顶部 层导电迹线通过延伸穿过硬宏的通孔连接到底层导电迹线。

    Method and apparatus for generating random numbers using a physical entropy source
    4.
    发明授权
    Method and apparatus for generating random numbers using a physical entropy source 有权
    使用物理熵源产生随机数的方法和装置

    公开(公告)号：US09164729B2

    公开(公告)日：2015-10-20

    申请号：US13759130

    申请日：2013-02-05

    Applicant: QUALCOMM Incorporated

    Inventor： Wenqing Wu ,  Peiyuan Wang ,  Raghu Sagar Madala ,  Senthil Kumar Govindaswamy ,  Kendrick H. Yuen ,  Robert P. Gilmore ,  Jung Pill Kim ,  Seung H. Kang

    IPC: G06F7/58

    CPC classification number: G06F7/58 ,  G06F7/588

    Abstract: A method and apparatus for generating random binary sequences from a physical entropy source having a state A and a state B by detecting whether the physical entropy source is in the state A or in the state B, attempting to shift the state of the physical entropy source to the opposite state in a probabilistic manner with less than 100% certainty, and producing one of four outputs based on the detected state and the state of the physical entropy source before the attempted shift. The outputs are placed in first and second queues and extracted in pairs from each queue. Random binary bits are output based on the sequences extracted from each queue.

    Abstract translation: 一种用于通过检测物理熵源是处于状态A还是处于状态B从具有状态A和状态B的物理熵源生成随机二进制序列的方法和装置，试图移动物理熵源的状态 以小于100％确定性的概率方式处于相反状态，并且在尝试移位之前基于检测到的状态和物理熵源的状态产生四个输出中的一个。 将输出放置在第一和第二队列中，并从每个队列成对提取。 基于从每个队列提取的序列输出随机二进制位。

    METHOD AND APPARATUS FOR GENERATING RANDOM NUMBERS USING A PHYSICAL ENTROPY SOURCE
    5.
    发明申请
    METHOD AND APPARATUS FOR GENERATING RANDOM NUMBERS USING A PHYSICAL ENTROPY SOURCE 有权
    使用物理熵源产生随机数的方法和装置

    公开(公告)号：US20140222880A1

    公开(公告)日：2014-08-07

    申请号：US13759130

    申请日：2013-02-05

    Applicant: QUALCOMM INCORPORATED

    Inventor： Wenqing Wu ,  Peiyuan Wang ,  Raghu Sagar Madala ,  Senthil Kumar Govindaswamy ,  Kendrick H. Yuen ,  Robert P. Gilmore ,  Jung Pill Kim ,  Seung H. Kang

    IPC: G06F7/58

    CPC classification number: G06F7/58 ,  G06F7/588

    Abstract: A method and apparatus for generating random binary sequences from a physical entropy source having a state A and a state B by detecting whether the physical entropy source is in the state A or in the state B, attempting to shift the state of the physical entropy source to the opposite state in a probabilistic manner with less than 100% certainty, and producing one of four outputs based on the detected state and the state of the physical entropy source before the attempted shift. The outputs are placed in first and second queues and extracted in pairs from each queue. Random binary bits are output based on the sequences extracted from each queue.

    Abstract translation: 一种用于通过检测物理熵源是处于状态A还是处于状态B从具有状态A和状态B的物理熵源生成随机二进制序列的方法和装置，试图移动物理熵源的状态 以小于100％确定性的概率方式处于相反状态，并且在尝试移位之前基于检测到的状态和物理熵源的状态产生四个输出中的一个。 将输出放置在第一和第二队列中，并从每个队列成对提取。 基于从每个队列提取的序列输出随机二进制位。

    Clock distribution using MTJ sensing
    6.
    发明授权
    Clock distribution using MTJ sensing 有权
    使用MTJ传感的时钟分配

    公开(公告)号：US08779824B2

    公开(公告)日：2014-07-15

    申请号：US13716263

    申请日：2012-12-17

    Applicant: QUALCOMM Incorporated

    Inventor： Wenqing Wu ,  Kendrick H. Yuen ,  David W. Hansquine ,  Robert P. Gilmore ,  Jeff A. Levin

    IPC: G06F1/04 ,  H03K3/00

    CPC classification number: H03K3/59

    Abstract: Clock signals are distributed on a chip by applying an oscillating magnetic field to the chip. Local clock generation circuits including magnetic field sensors are distributed around the chip and are coupled to local clocked circuitry on the chip. The magnetic field sensors may include clock magnetic tunnel junctions (MTJs) in which a magnetic orientation of the free layer is free to rotate in the free layer plane in response to the applied magnetic field. The MTJ resistance alternates between a high resistance value and a low resistance value as the free layer magnetization rotates. Clock generation circuitry coupled to the clock MTJs senses voltage oscillations caused by the alternating resistance of the clock MTJs. The clock generation circuitry includes amplifiers, which convert the sensed voltage into local clock signals.

    Abstract translation: 时钟信号通过向芯片施加振荡磁场而分布在芯片上。 包括磁场传感器的本地时钟发生电路分布在芯片周围，并且耦合到芯片上的本地时钟电路。 磁场传感器可以包括响应于所施加的磁场，自由层的磁性取向在自由层平面中自由旋转的时钟磁隧道结（MTJ）。 随着自由层磁化旋转，MTJ电阻在高电阻值和低电阻值之间交替。 耦合到时钟MTJ的时钟产生电路感测由时钟MTJ的交流电阻引起的电压振荡。 时钟产生电路包括放大器，其将所感测的电压转换成本地时钟信号。

    CLOCK DISTRIBUTION USING MTJ SENSING
    7.
    发明申请
    CLOCK DISTRIBUTION USING MTJ SENSING 有权
    使用MTJ感知的时钟分配

    公开(公告)号：US20140167831A1

    公开(公告)日：2014-06-19

    申请号：US13716263

    申请日：2012-12-17

    Applicant: QUALCOMM INCORPORATED

    Inventor： Wenqing Wu ,  Kendrick H. Yuen ,  David W. Hansquine ,  Robert P. Gilmore ,  Jeff A. Levin

    IPC: H03K3/59

    CPC classification number: H03K3/59

    Abstract: Clock signals are distributed on a chip by applying an oscillating magnetic field to the chip. Local clock generation circuits including magnetic field sensors are distributed around the chip and are coupled to local clocked circuitry on the chip. The magnetic field sensors may include clock magnetic tunnel junctions (MTJs) in which a magnetic orientation of the free layer is free to rotate in the free layer plane in response to the applied magnetic field. The MTJ resistance alternates between a high resistance value and a low resistance value as the free layer magnetization rotates. Clock generation circuitry coupled to the clock MTJs senses voltage oscillations caused by the alternating resistance of the clock MTJs. The clock generation circuitry includes amplifiers, which convert the sensed voltage into local clock signals.

    Abstract translation: 时钟信号通过向芯片施加振荡磁场而分布在芯片上。 包括磁场传感器的本地时钟发生电路分布在芯片周围，并且耦合到芯片上的本地时钟电路。 磁场传感器可以包括响应于所施加的磁场，自由层的磁性取向在自由层平面中自由旋转的时钟磁隧道结（MTJ）。 随着自由层磁化旋转，MTJ电阻在高电阻值和低电阻值之间交替。 耦合到时钟MTJ的时钟产生电路感测由时钟MTJ的交流电阻引起的电压振荡。 时钟产生电路包括放大器，其将所感测的电压转换成本地时钟信号。

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