Etch stop layer for injecting carriers into drift layer for a vertical power device

    公开(公告)号:US11916138B2

    公开(公告)日:2024-02-27

    申请号:US17725326

    申请日:2022-04-20

    摘要: A sacrificial substrate wafer is provided. A low resistivity etch stop layer is formed on or in the top surface of the wafer. The etch stop layer may be a highly doped, p+ type epitaxially grown layer, or an implanted p+ type boron layer, or an epitaxially grown p+ type SiGe layer. Various epitaxial layers, such as an n− type drift layer, and doped regions are then formed over the etch stop layer to form a vertical power device. The starting wafer is then removed by a combination of mechanical grinding/polishing to leave a thinner layer of the starting wafer. A chemical or plasma etch is then used to remove the remainder of the starting wafer, using the etch stop layer to automatically stop the etching. A bottom metal electrode is then formed on the etch stop layer. The etch stop layer injects hole carriers into the drift layer.

    Gate-turn-off thyristor and manufacturing method thereof

    公开(公告)号:US11705510B2

    公开(公告)日:2023-07-18

    申请号:US17259197

    申请日:2019-07-02

    发明人: Simin Li

    摘要: A gate-turn-off thyristor is provided. The gate-turn-off thyristor includes a plurality of strips formed by repeatedly arranging a plurality of N-type emitter regions with high doping concentration of an upper transistor on an upper surface of an N-type silicon substrate with high resistivity, wherein a periphery of each strip of the plurality of strips is surrounded with a P-type dense base region bus bar of the upper transistor, a cathode metal layer is disposed on an N-type emitter region of the plurality of N-type emitter regions of the upper transistor, and a P-type base region of the upper transistor is disposed below the N-type emitter region of the upper transistor; a side of the P-type base region of the upper transistor is connected to a P-type dense base region of the upper transistor or a P-type dense base region bus bar of the upper transistor.

    ANTI-PARALLEL DIODE FORMED USING DAMAGED CRYSTAL STRUCTURE IN A VERICAL POWER DEVICE

    公开(公告)号:US20220344493A1

    公开(公告)日:2022-10-27

    申请号:US17725037

    申请日:2022-04-20

    摘要: After the various regions of a vertical power device are formed in or on the top surface of an n-type wafer, the wafer is thinned, such as by grinding. A drift layer may be n-type, and various n-type regions and p-type regions in the top surface contact a top metal electrode. A blanket dopant implant through the bottom surface of the thinned wafer is performed to form an n− buffer layer and a bottom p+ emitter layer. Energetic particles are injected through the bottom surface to intentionally damage the crystalline structure. A wet etch is performed, which etches the damaged crystal at a much greater rate, so some areas of the n− buffer layer are exposed. The bottom surface is metallized. The areas where the metal contacts the n− buffer layer form cathodes of an anti-parallel diode for conducting reverse voltages, such as voltage spikes from inductive loads.

    Thyristor assembly
    7.
    发明授权

    公开(公告)号:US11349021B2

    公开(公告)日:2022-05-31

    申请号:US16827925

    申请日:2020-03-24

    申请人: Littelfuse, Inc.

    摘要: A power control switch assembly. The assembly may include a thyristor device, where the thyristor device includes a first device terminal, a second device terminal, and a gate terminal> The assembly may include a negative temperature coefficient (NTC) device, electrically coupled to the gate terminal of the thyristor device on a first end, and electrically coupled to the first device terminal of the thyristor device on a second end, wherein the NTC device is thermally coupled to the thyristor device.

    Automatically limiting power consumption by devices using infrared or radio communications

    公开(公告)号:US11289619B2

    公开(公告)日:2022-03-29

    申请号:US16671729

    申请日:2019-11-01

    摘要: Methods, apparatus, and processor-readable storage media for automatically limiting power consumption by devices using infrared or radio communications are provided herein. An example computer-implemented method includes detecting, via at least one photodiode of an emitting sensor, one or more signals output by a user device within a predetermined proximity; automatically transitioning, via utilizing at least one transistor connected to the photodiode, and in response to detecting the one or more signals, the emitting sensor from a first power-consumption state to a second power-consumption state; transmitting one or more signals in response to transitioning from the first power-consumption state to the second power-consumption state; and subsequent to transmitting, automatically transitioning, via utilizing the at least one transistor, the emitting sensor from the second power-consumption state to the first power-consumption state after a predetermined amount of time has elapsed during which no signals were detected.

    Insulated-gate semiconductor device and method of manufacturing the same

    公开(公告)号:US11177350B2

    公开(公告)日:2021-11-16

    申请号:US16844113

    申请日:2020-04-09

    发明人: Keiji Okumura

    摘要: An insulated-gate semiconductor device, which has trenches arranged in a chip structure, the trenches defining both sidewalls in a first and second sidewall surface facing each other, includes: a first unit cell including a main-electrode region in contact with a first sidewall surface of a first trench, a base region in contact with a bottom surface of the main-electrode region and the first sidewall surface, a drift layer in contact with a bottom surface of the base region and the first sidewall surface, and a gate protection-region in contact with the second sidewall surface and a bottom surface of the first trench; and a second unit cell including an operation suppression region in contact with a first sidewall surface and a second sidewall surface of a second trench, wherein the second unit cell includes the second trench located at one end of an array of the trenches.

    THYRISTOR ASSEMBLY
    10.
    发明申请

    公开(公告)号:US20210305415A1

    公开(公告)日:2021-09-30

    申请号:US16827925

    申请日:2020-03-24

    申请人: Littelfuse, Inc.

    摘要: A power control switch assembly. The assembly may include a thyristor device, where the thyristor device includes a first device terminal, a second device terminal, and a gate terminal> The assembly may include a negative temperature coefficient (NTC) device, electrically coupled to the gate terminal of the thyristor device on a first end, and electrically coupled to the first device terminal of the thyristor device on a second end, wherein the NTC device is thermally coupled to the thyristor device.