公开(公告)号：US20240008174A1

公开(公告)日：2024-01-04

申请号：US17852698

申请日：2022-06-29

Applicant: Microsoft Technology Licensing, LLC

Inventor： Stephen Edward HODGES ,  Michal J. MOSKAL ,  Gabriele D'AMONE ,  James Alexander DEVINE ,  Jonathan Paul DE HALLEUX ,  Thomas Jaudon BALL

IPC: H05K1/02 ,  H05K1/11

CPC classification number: H05K1/0292 ,  H05K1/117 ,  H05K1/0293 ,  H05K2201/09163 ,  H05K2201/09236 ,  H05K2201/09245 ,  H05K2201/09027 ,  H05K2201/09127

Abstract: The description relates to prototyping systems, including hubs for electrically connecting devices. One example can include an electrically insulative substrate and at least two connector tabs defined by the substrate, each connector tab including a data contact, a power contact, and a ground contact positioned over the substrate. A data bus can be positioned relative to the substrate and electrically connect all of the data contacts, a power bus can be positioned relative to the substrate and electrically connect all of the power contacts, and a ground bus can be positioned relative to the substrate and electrically connect all of the ground contacts.

公开(公告)号：US20230328900A1

公开(公告)日：2023-10-12

申请号：US17741499

申请日：2022-05-11

Applicant: UNIMICRON TECHNOLOGY CORP.

Inventor： Shih-Lian Cheng

IPC: H05K3/46 ,  H05K3/00 ,  H05K3/24 ,  H05K3/04 ,  H05K1/02

CPC classification number: H05K3/4697 ,  H05K3/0097 ,  H05K3/0094 ,  H05K3/0044 ,  H05K3/241 ,  H05K3/04 ,  H05K1/0298 ,  H05K2201/09127 ,  H05K2203/025

Abstract: In the manufacture method of the present invention, an inner circuit structure is prepared, and a docking pad is formed on the first surface of the inner circuit structure. A release film is mounted on the first surface to cover the docking pad before mounting a build-up circuit structure upon the first surface. The release film and part of the build-up circuit structure above it are removed. The docking pad is therefore exposed and a docking opening is formed in the build-up circuit structure. The docking opening is for mounting a circuit board to be docked to form a circuit board module of the present invention.

公开(公告)号：US09977074B2

公开(公告)日：2018-05-22

申请号：US14672611

申请日：2015-03-30

Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.

Inventor： Tomoharu Fujii

IPC: H05K7/10 ,  H05K7/12 ,  G01R31/28 ,  H05K1/02 ,  H05K3/00 ,  H01L23/00

CPC classification number: G01R31/2818 ,  H01L24/97 ,  H01L2224/16225 ,  H01L2924/15192 ,  H01L2924/19105 ,  H05K1/0268 ,  H05K3/0052 ,  H05K2201/09036 ,  H05K2201/09127 ,  H05K2201/0989 ,  H05K2201/09972 ,  H05K2203/175

Abstract: A semiconductor device includes a board, an electronic component, an evaluation component, a wiring, and a groove portion. The board includes a product area, a non-product area, and a boundary area between the product area and the non-product area. The electronic component is mounted in the product area. The evaluation component is mounted in the non-product area. The wiring electrically connects the electronic component and the evaluation component. The groove portion is formed in the boundary area of the board so as to overlap at least a part of the wiring in a plan view. The non-product area is surrounded by the groove portion and at least a portion of sides of the board.

公开(公告)号：US09711894B2

公开(公告)日：2017-07-18

申请号：US15161291

申请日：2016-05-23

Applicant: FOXCONN INTERCONNECT TECHNOLOGY LIMITED

Inventor： Ru-Yang Guo ,  Hai-Li Wang ,  Shuai-Hui Huang ,  Jian-Fang Li ,  Qing-Man Zhu ,  Jerry Wu

IPC: H01R13/66 ,  H01R13/627 ,  H05K1/02 ,  H01R29/00

CPC classification number: H01R13/6275 ,  H01R13/6658 ,  H01R29/00 ,  H05K1/0292 ,  H05K2201/0909 ,  H05K2201/09127

Abstract: An electrical connector comprises a printed circuit board module including a printed circuit board (PCB) and a plurality of electrical elements disposed on the PCB, the PCB includes a mating end for mating with a mating connector and a plurality of conductive paths electrically connecting with the electrical elements; wherein the PCB includes a fracture surface, and the plurality of conductive paths are exposed to the fracture surface.

公开(公告)号：US20170127508A1

公开(公告)日：2017-05-04

申请号：US15407273

申请日：2017-01-17

Applicant: GE Embedded Electronics Oy

Inventor： Antti Iihola ,  Tuomas Waris

IPC: H05K1/02 ,  H05K1/11 ,  H05K1/18

CPC classification number: H05K1/028 ,  H01L21/568 ,  H01L24/18 ,  H01L24/19 ,  H01L24/24 ,  H01L24/82 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/18 ,  H01L2224/2919 ,  H01L2224/32245 ,  H01L2224/83005 ,  H01L2224/83192 ,  H01L2224/92144 ,  H01L2924/01002 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01011 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01061 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/1461 ,  H01L2924/181 ,  H05K1/115 ,  H05K1/182 ,  H05K1/188 ,  H05K1/189 ,  H05K3/4691 ,  H05K2201/0187 ,  H05K2201/0355 ,  H05K2201/09127 ,  H05K2203/308 ,  H01L2924/0665 ,  H01L2924/00

Abstract: Rigid-flex-type circuit-board structure and manufacturing method, in which a flexible membrane and a sacrificial-material piece are attached to an insulator membrane in the location of the flexible zone. An insulator layer, which encloses within itself a sacrificial-material piece is manufactured on the surface of the conductor membrane. The flexible zone is formed in such a way that an opening is made in the insulator layer, through which the sacrificial-material piece is removed. The flexible zone comprises at least part of the flexible membrane as well as conductors, which are manufactured by patterning the insulator membrane at a suitable stage in the method.

公开(公告)号：US20170120390A1

公开(公告)日：2017-05-04

申请号：US15337513

申请日：2016-10-28

Applicant: Laser Systems Inc. ,  NICHIA CORPORATION

Inventor： Kock Khuen SEET ,  Masayuki HAYASHIDA ,  Masakazu SAKAMOTO ,  Hiroto TAMAKI

IPC: B23K26/382 ,  B23K26/0622 ,  B23K26/402 ,  B23K26/082

CPC classification number: B23K26/382 ,  B23K26/0622 ,  B23K26/082 ,  B23K26/18 ,  B23K26/402 ,  B23K2103/10 ,  B23K2103/12 ,  B23K2103/42 ,  H05K3/0035 ,  H05K2201/09127 ,  H05K2203/0554

Abstract: A manufacturing method of a processed resin substrate includes: preparing a resin substrate including a resin layer and a metal layer that covers at least a part of one surface of the resin layer; and forming a through hole in the resin substrate by irradiating the resin substrate with pulsed laser light. In the forming of the through hole, an interval of irradiation of the pulsed laser light at each point on the resin substrate is 5 msec or more.

公开(公告)号：US20170064835A1

公开(公告)日：2017-03-02

申请号：US15252286

申请日：2016-08-31

Applicant: IBIDEN CO., LTD.

Inventor： Teruyuki ISHIHARA ,  Haiying MEI ,  Hiroyuki BAN

IPC: H05K1/18 ,  H05K1/03 ,  H05K3/46 ,  H05K3/00 ,  H01L23/538 ,  H01L21/48 ,  H01L21/683 ,  H05K1/11 ,  H05K1/02

CPC classification number: H05K1/183 ,  H01L21/4857 ,  H01L21/486 ,  H01L21/6835 ,  H01L23/13 ,  H01L23/3128 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/5383 ,  H01L23/5384 ,  H01L23/5386 ,  H01L23/5389 ,  H01L25/105 ,  H01L2221/68345 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/32145 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2225/0651 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/15153 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/1533 ,  H05K3/0097 ,  H05K3/205 ,  H05K3/4682 ,  H05K3/4697 ,  H05K2201/09127 ,  H01L2924/00014

Abstract: A printed wiring board includes a first circuit substrate having a first surface and a second surface on the opposite side, and a second circuit substrate having a third surface and a fourth surface on the opposite side such that the first circuit substrate is laminated on the third surface and that the first surface and the third surface are opposing each other. The second circuit substrate has a mounting area on the third surface and includes pads positioned to mount an electronic component in the mounting area and a connection wire structure connected to the pads, and the first circuit substrate includes through-hole conductors extending from the first surface to the second surface and connected to the pads through the connection wire structure and has an opening portion formed through the first circuit substrate such that the opening portion is exposing the pads formed in the mounting area.

Abstract translation: 一种印刷电路板包括具有第一表面和相对侧的第二表面的第一电路基板，以及第二电路基板，其具有在相对侧上的第三表面和第四表面，使得第一电路基板层叠在第三 并且第一表面和第三表面彼此相对。 第二电路基板在第三表面上具有安装区域，并且包括定位成将电子部件安装在安装区域中的焊盘和连接到焊盘的连接线结构，并且第一电路基板包括从第一表面延伸的通孔导体 通过所述连接线结构连接到所述焊盘，并且具有通过所述第一电路基板形成的开口部，使得所述开口部露出形成在所述安装区域中的焊盘。

公开(公告)号：US09565767B2

公开(公告)日：2017-02-07

申请号：US13961629

申请日：2013-08-07

Applicant: Sony Corporation

Inventor： Junichi Sato

IPC: H05K1/11 ,  H05K1/18 ,  H05K3/46 ,  H01L23/13 ,  H01L23/538 ,  H05K3/00 ,  H05K1/02 ,  H05K1/14 ,  H01L23/31 ,  H01L23/00

CPC classification number: H05K1/184 ,  H01L23/13 ,  H01L23/3128 ,  H01L23/5383 ,  H01L23/5384 ,  H01L23/5389 ,  H01L24/73 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/48227 ,  H01L2224/49109 ,  H01L2224/73257 ,  H01L2224/73265 ,  H01L2924/15153 ,  H01L2924/15311 ,  H01L2924/19105 ,  H01L2924/19106 ,  H05K1/0271 ,  H05K1/141 ,  H05K1/181 ,  H05K1/183 ,  H05K3/007 ,  H05K3/0097 ,  H05K3/4602 ,  H05K3/4697 ,  H05K2201/09127 ,  H05K2201/09918 ,  H05K2201/10674 ,  H05K2203/0228 ,  H01L2924/00012

Abstract: There is provided a wiring board including a stiffener bonded to a circuit board, and a laminate formed by laminating a plurality of insulating layers and a plurality of wiring layers on a face of the stiffener opposite to a face bonded to the circuit board. On both faces of the laminate in a laminating direction, terminal connection parts connected to the wiring layers and connected to a terminal part of an electronic component are formed. Further, a component disposition hole, in which the terminal connection parts formed on one of the faces of the laminate are positioned and the electronic component is disposed, and a through hole for connection to the circuit board are formed in the stiffener.

Abstract translation: 提供了一种布线板，其包括结合到电路板的加强件和通过在加强件的与接合到电路板的表面相对的表面上层叠多个绝缘层和多个布线层而形成的层压体。 在层叠方向的层叠体的两面上，形成与布线层连接并与电子部件的端子部连接的端子连接部。 此外，在该加强件中形成有将形成在层叠体的一个表面上的端子连接部分定位并且设置电子部件的部件布置孔，并且用于连接到电路板的通孔。

公开(公告)号：US09545015B2

公开(公告)日：2017-01-10

申请号：US13433166

申请日：2012-03-28

Applicant: Hiroto Sugahara

Inventor： Hiroto Sugahara

IPC: B41J2/16 ,  H05K3/36 ,  H05K3/34 ,  B41J2/14 ,  H05K3/32 ,  H05K1/02 ,  H05K3/00 ,  H05K3/10 ,  H05K3/40

CPC classification number: H05K3/361 ,  B41J2/14233 ,  B41J2/161 ,  B41J2/1623 ,  B41J2/1626 ,  B41J2/1632 ,  B41J2/1634 ,  B41J2/1642 ,  B41J2/1646 ,  B41J2002/14491 ,  H01L2924/00 ,  H01L2924/0002 ,  H05K1/0272 ,  H05K3/0052 ,  H05K3/107 ,  H05K3/321 ,  H05K3/3405 ,  H05K3/3415 ,  H05K3/363 ,  H05K3/4069 ,  H05K2201/09127 ,  H05K2201/10378 ,  H05K2201/10674 ,  H05K2203/013 ,  Y10T29/49117 ,  Y10T29/49124 ,  Y10T29/49147 ,  Y10T29/49155 ,  Y10T29/49165

Abstract: A method for connecting two objects electrically by an electroconductive liquid is described. The method includes providing a substrate having a first surface and a second surface opposite to the first surface. Thereafter, the method includes forming a channel of the liquid on the first surface of the substrate to extend along the first surface of the substrate. Further, the method includes forming a through hole in the substrate. Moreover, the method includes arranging the two objects to interpose the substrate, wherein the two objects overlap with the openings of the through hole. Next, the method further includes filling the liquid to the through hole via the channel, bringing the liquid in contact with the two objects, and hardening the liquid. Further still, the method further includes wherein a surface of the liquid hole bulges to form a projection which makes contact with one of the two objects.

Abstract translation: 描述了通过导电液体电连接两个物体的方法。 该方法包括提供具有与第一表面相对的第一表面和第二表面的基底。 此后，该方法包括在衬底的第一表面上形成液体的通道，以沿衬底的第一表面延伸。 此外，该方法包括在基板中形成通孔。 此外，该方法包括布置两个物体以插入基板，其中两个物体与通孔的开口重叠。 接下来，该方法还包括经由通道将液体填充到通孔，使液体与两个物体接触，并使液体硬化。 此外，该方法还包括其中液体孔的表面凸出以形成与两个物体之一接触的突起。

公开(公告)号：US09501736B2

公开(公告)日：2016-11-22

申请号：US15013939

申请日：2016-02-02

Applicant: NEOLOGY, INC.

Inventor： Paul Elizondo ,  John Azevedo

IPC: G06K19/07 ,  G06K19/077 ,  H04J3/06 ,  G06K7/00 ,  G06Q10/08 ,  G06K7/10 ,  H05K1/02 ,  H05K1/14 ,  H05K3/30

CPC classification number: G06K7/10475 ,  G06K7/0008 ,  G06K7/10029 ,  G06K7/10039 ,  G06K19/0723 ,  G06K19/07796 ,  G06K19/07798 ,  G06Q10/08 ,  H04J3/0641 ,  H05K1/02 ,  H05K1/0266 ,  H05K1/0268 ,  H05K1/142 ,  H05K3/30 ,  H05K2201/0909 ,  H05K2201/09127

Abstract: A breakaway RFID tag is configured such that it comprises part of a Printed Circuit Board Assembly (PCB). Thus, the breakaway RFID tag can be used to track the PCB as it migrates through a manufacturing process. In one embodiment, the RFID tag can be assembled first and then used to track the PCB as it is populated with components and installed into larger assemblies and ultimately into the end device. Once the PCB is installed into a larger assembly or the end device, the breakaway RFID tag is configured such that it can be broken off and attached to the outside of the larger assembly or end device.