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公开(公告)号：US11831326B2
公开(公告)日：2023-11-28
申请号：US17953449
申请日：2022-09-27
发明人： Takanori Satake , Yuzoh Yamauchi , Satoshi Nishio
CPC分类号： H03M1/361 , H03M1/0609 , H03M1/10 , H03M1/1028 , H03M1/36 , H03M1/38
摘要： An analog-to-digital conversion system includes: a first conversion device configured to communicate with a first analog-to-digital converter configured to convert a first analog signal into a first digital signal; a second conversion device configured to communicate with a second analog-to-digital converter configured to convert a second analog signal into a second digital signal; a first reference low power supply; and a second reference low power supply. The first conversion device is configured to correct the first digital signal, based on a variation amount of a second reference low voltage or a second reference low current. The second conversion device is configured to correct the second digital signal, based on a variation amount of a first reference low voltage or a first reference low current.
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公开(公告)号：US20180205387A1
公开(公告)日：2018-07-19
申请号：US15920906
申请日：2018-03-14
申请人： MaxLinear, Inc.
发明人： Curtis Ling
摘要： Aspects of a method and system for data converters having a transfer function with multiple operating zones. In some embodiments, an operating zone of the multiple operating zones is characterized by more stringent performance criteria than the other operating zones. Thus, such data converters may receive an input signal and generate an output signal from the input signal per the transfer function and the more stringent performance criteria in the appropriate operating zone.
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公开(公告)号：US09897490B2
公开(公告)日：2018-02-20
申请号：US14618911
申请日：2015-02-10
申请人： SOCIONEXT INC.
发明人： Takashi Miyazaki , Hiroyuki Hamano
摘要： In a first sensing state in which a first current flows in a forward direction with respect to a pn junction of a first semiconductor element and a second current of a different magnitude from the first current flows in a forward direction with respect to a pn junction of a second semiconductor element, a difference between a forward direction voltage of the pn junction of the first semiconductor element and a forward direction voltage of the pn junction of the second semiconductor element is converted into a digital value by a computer and acquired as a first digital value. In a second sensing state in which the second current flows in the forward direction in the pn junction of the first semiconductor element and the first current flows in the forward direction in the pn junction of the second semiconductor element, a difference between the forward direction voltage of the pn junction of the first semiconductor element and the forward direction voltage of the pn junction of the second semiconductor element is converted into a digital value by the computer and acquired as a second digital value. A temperature measurement value is computed based on an average value of the first digital value and the second digital value by the computer.
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公开(公告)号：US09543973B2
公开(公告)日：2017-01-10
申请号：US14925040
申请日：2015-10-28
申请人： MaxLinear, Inc.
发明人： Curtis Ling
摘要： Aspects of a method and system for data converters having a transfer function with multiple operating zones. In some embodiments, an operating zone of the multiple operating zones is characterized by more stringent performance criteria than the other operating zones. Thus, such data converters may receive an input signal and generate an output signal from the input signal per the transfer function and the more stringent performance criteria in the appropriate operating zone.
摘要翻译： 具有多个操作区域的传递函数的数据转换器的方法和系统的方面。 在一些实施例中，多个操作区域的操作区域的特征在于比其他操作区域更严格的性能准则。 因此，这样的数据转换器可以接收输入信号并且根据传递函数从输入信号生成输出信号，并在适当的操作区域中产生更严格的性能标准。
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公开(公告)号：US20160322982A1
公开(公告)日：2016-11-03
申请号：US15209711
申请日：2016-07-13
CPC分类号： H03M1/0626 , H03M1/36 , H03M3/322 , H03M3/38 , H03M3/402 , H03M3/418 , H03M3/436 , H03M3/468
摘要： Provided are, among other things, systems, methods and techniques for converting a continuous-time, continuously variable signal into a sampled and quantized signal. According to one implementation, an apparatus includes multiple processing branches, each including: a bandpass noise-shaping circuit, a sampling/quantization circuit, and a digital bandpass filter. A combining circuit then combines signals at the processing branch outputs into a final output signal. The bandpass noise-shaping circuits include adjustable circuit components for changing their quantization-noise frequency-response minimum, and the digital bandpass filters include adjustable parameters for changing their frequency passbands.
摘要翻译： 尤其提供了用于将连续时间连续可变信号转换为采样和量化信号的系统，方法和技术。 根据一个实施方式，一种装置包括多个处理分支，每个分支包括：带通噪声整形电路，采样/量化电路和数字带通滤波器。 然后，组合电路将处理分支输出处的信号组合成最终的输出信号。 带通噪声整形电路包括用于改变其量化噪声频率响应最小值的可调节电路组件，并且数字带通滤波器包括用于改变其频率通带的可调参数。
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公开(公告)号：US20160134290A1
公开(公告)日：2016-05-12
申请号：US14933915
申请日：2015-11-05
申请人： PYXALIS
CPC分类号： H03K23/005 , H03K4/06 , H03M1/36 , H03M7/16
摘要： An N-bit Gray counter, with N an integer greater than 1, comprises a string of N logic cells connected in cascade, wherein each logic cell comprises an input port for a succession of clock pulses, a circuit for generating a Gray count bit having an output port for the Gray count bit and a circuit for generating a clock signal having a clock output port linked to the input port of the following logic cell. An analogue-digital converter of ramp type using such a Gray counter is also provided.
摘要翻译： N为大于1的整数的N位灰计数器包括串联连接的N个逻辑单元的串，其中每个逻辑单元包括用于一系列时钟脉冲的输入端口，用于产生具有 用于灰色计数位的输出端口和用于产生具有链接到以下逻辑单元的输入端口的时钟输出端口的时钟信号的电路。 还提供了使用这种灰色计数器的斜坡型模拟数字转换器。
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7.发明授权System and method for dynamic path-mismatch equalization in time-interleaved ADC 有权时间交织ADC中动态路径失配均衡的系统和方法公开(公告)号：US09287889B2
公开(公告)日：2016-03-15
申请号：US14255168
申请日：2014-04-17
CPC分类号： H03M1/1009 , H03M1/0678 , H03M1/0836 , H03M1/1225 , H03M1/36
摘要： Disclosed are methods and systems implementing digital background calibration techniques for identifying and remedying dynamic path-mismatch errors in time-interleaved analog-to-digital converters (TI-ADC). The disclosed systems and methods employ a calibration technique specifically focuses on removing the timing skew and input bandwidth mismatches by equalizing each sub-ADC in an array to a common reference ADC using direct input derivative information. The errors are identified by correlating the ensuing conversion error to the input derivatives of various orders to identify the mismatch parameters. Simple passive high-pass filters (HPF) are used to extract input derivatives followed by one-bit quantizers.
摘要翻译： 公开了实现用于识别和补救时间交织的模数转换器（TI-ADC）中的动态路径失配错误的数字背景校准技术的方法和系统。 所公开的系统和方法采用校准技术，其特别集中在通过使用直接输入导数信息将阵列中的每个子ADC均衡到公共参考ADC来消除定时偏移和输入带宽失配。 通过将随后的转换误差与各种顺序的输入导数相关联以识别不匹配参数来识别误差。 简单的无源高通滤波器（HPF）用于提取输入导数，后跟一位量化器。
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8.发明申请COUNTER, ANALOGUE TO DIGITAL CONVERTER INCLUDING THE COUNTER AND IMAGE SENSING DEVICE INCLUDING THE ANALOGUE TO DIGITAL CONVERTER 有权计数器，数字转换器的模拟，包括计数器和图像传感装置，包括数字转换器的模拟公开(公告)号：US20150326242A1
公开(公告)日：2015-11-12
申请号：US14490440
申请日：2014-09-18
申请人： SK hynix Inc.
发明人： Min-Seok SHIN
CPC分类号： H03M1/56 , G11C27/02 , H03K4/02 , H03K19/21 , H03K21/10 , H03M1/123 , H03M1/1245 , H03M1/36 , H04N5/376 , H04N5/378
摘要： A counter includes a sampling unit suitable for sampling a logic state of a least significant bit (LSB) during a counting hold section, the counting hold section is present between first and second ramp sections; and a toggling control unit suitable for, in response to a clock and a sampling signal outputted from the sampling unit, generating the LSB according to a first voltage level of a counting target signal during a second part of the first ramp section and generating the LSB according to a second voltage level of the counting target signal during a first part of the second ramp section.
摘要翻译： 计数器包括适于在计数保持部分期间采样最低有效位（LSB）的逻辑状态的采样单元，计数保持部分存在于第一和第二斜坡部分之间; 以及切换控制单元，其适于响应于从所述采样单元输出的时钟和采样信号，在所述第一斜坡部分的第二部分期间根据计数目标信号的第一电压电平生成所述LSB，并且生成所述LSB 根据第二斜坡部分的第一部分期间的计数目标信号的第二电压电平。
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公开(公告)号：US20150263752A1
公开(公告)日：2015-09-17
申请号：US14727935
申请日：2015-06-02
发明人： Masumi KON , Jou KUDOU
CPC分类号： H03M1/36 , G01K15/007 , G01R27/02 , H03M1/0607 , H03M1/0617 , H03M1/1019 , H03M1/52
摘要： To suppress detection accuracy of a measurement resistance from decreasing by an on-resistance of a selector switch. The selector switch is provided between a first node coupled to a first voltage through a reference resistance and multiple second nodes coupled to the second voltage through measurement resistances, and selects the second node to be coupled to the first node with the selector switch. A correction circuit generates a voltage obtained by adding the second voltage to a voltage between the second node and the first node as a correction voltage. A double integral ADC finds a first integral time elapsed when a difference voltage of the correction voltage to a voltage of the first node is integrated to the first voltage and a second integral time elapsed when the difference voltage of the first voltage to the voltage of the first node is integrated to the correction voltage.
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公开(公告)号：US09136862B2
公开(公告)日：2015-09-15
申请号：US14138261
申请日：2013-12-23
摘要： In one embodiment the quantizer includes a signal-to-phase converter configured to generate a phase signal according to an input signal and a phase difference digitization block configured to generate a quantization output according to differentiated samples of the phase signal, where the phase signal generated by the signal-to-phase converter has a sinusoidal shape.
摘要翻译： 在一个实施例中，量化器包括信号相变转换器，其被配置为根据输入信号产生相位信号，并且相位差数字化块被配置为根据相位信号的微分采样产生量化输出，其中相位信号产生 通过信号到相位转换器具有正弦形状。
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