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    SEMICONDUCTOR DEVICE INCLUDING SHORT-CIRCUIT PROTECTION
    3.
    发明申请
    SEMICONDUCTOR DEVICE INCLUDING SHORT-CIRCUIT PROTECTION 有权
    包含短路保护的半导体器件

    公开(公告)号：US20140078629A1

    公开(公告)日：2014-03-20

    申请号：US14030182

    申请日：2013-09-18

    申请人： Infineon Technologies AG

    发明人： Fabrizio CORTIGIANI ,  Adolfo DE CICCO

    IPC分类号： H02H9/02

    CPC分类号： H02H9/02 ,  H03K17/0822 ,  H03K17/24 ,  H03K2217/0081

    摘要： A semiconductor device includes a load current path operable to carry a load current from a supply terminal having a supply voltage to an output circuit node. The device further includes a voltage comparator configured to compare the supply voltage with a voltage threshold and to signal a low supply voltage when the supply voltage reaches or falls below the voltage threshold. An over-current detector is configured to compare a load current signal that represents the load current with an over-current threshold and to signal an over-current when the load current signal reaches or exceeds the over-current threshold. Furthermore, the semiconductor device includes a control logic unit that is configured to deactivate the load current flow when an over-current is signalled and to reduce the over-current threshold from a first value to a lower second value as long as the voltage comparator signals a low supply voltage.

    摘要翻译： 半导体器件包括负载电流路径，其可操作以将负载电流从具有电源电压的电源端子承载到输出电路节点。 所述装置还包括电压比较器，被配置为将电源电压与电压阈值进行比较，并且当电源电压达到或低于电压阈值时向低电源电压发信号。 过电流检测器被配置为将表示负载电流的负载电流信号与过电流阈值进行比较，并且当负载电流信号达到或超过过电流阈值时，对过电流进行信号发送。 此外，半导体器件包括控制逻辑单元，其被配置为当发出过电流时使负载电流流动停止，并且只要电压比较器信号就将过电流阈值从第一值减小到较低的第二值 低电源电压。

    Semiconductor integrated circuit
    4.
    发明申请
    Semiconductor integrated circuit 有权
    半导体集成电路

    公开(公告)号：US20100321071A1

    公开(公告)日：2010-12-23

    申请号：US12662774

    申请日：2010-05-03

    申请人： Tsuneki Sasaki ,  Shuichi Kunie ,  Tatsuya Kawasaki

    发明人： Tsuneki Sasaki ,  Shuichi Kunie ,  Tatsuya Kawasaki

    IPC分类号： H03L7/00

    CPC分类号： H03K17/24

    摘要： A resume signal hold circuit holds an assertion of a resume signal instructed while the circuit block is in a stand-by mode. A resume signal mask circuit is provided between the circuit block and the resume signal hold circuit, and masks the signals while the circuit block is in the stand-by mode so that no signal can be input to the circuit block. A power saving control circuit causes the resume signal hold circuit to hold the assertion of the event signal and causes the resume signal mask circuit to mask the signals while the circuit block is in a stand-by mode. The power saving control circuit also causes the resume signal hold circuit to cancel the holding of the assertion of the resume signal after the completion of the resume setting of the circuit block and cancelling of the signal masking by the resume signal mask circuit.

    摘要翻译： 恢复信号保持电路保持当电路块处于待机模式时所指示的恢复信号的断言。 在电路块和恢复信号保持电路之间提供恢复信号屏蔽电路，并且在电路块处于待机模式时屏蔽信号，使得不向信号块输入信号。 省电控制电路使恢复信号保持电路保持事件信号的断言，并且使得恢复信号屏蔽电路在电路块处于待机模式的同时屏蔽信号。 省电控制电路还使得恢复信号保持电路在完成电路块的恢复设置并取消恢复信号掩蔽电路的信号屏蔽之后取消对恢复信号的断言的保持。

    Low-consumption inhibit circuit with hysteresis
    5.
    发明申请
    Low-consumption inhibit circuit with hysteresis 有权
    具有迟滞功能的低功耗抑制电路

    公开(公告)号：US20050280451A1

    公开(公告)日：2005-12-22

    申请号：US11143916

    申请日：2005-06-01

    申请人： Christophe Forel ,  Robert Cittadini

    发明人： Christophe Forel ,  Robert Cittadini

    IPC分类号： G06F1/28 ,  H03K17/22 ,  H03K17/24 ,  H03K19/00 ,  H03L7/00

    CPC分类号： H03K17/24 ,  H03K17/223

    摘要： An inhibit circuit which produces an inhibit signal when a variation in a power supply potential is detected includes a comparator having a negative input connected to a generator producing a reference potential and a positive input connected to an output of a first image circuit producing a first potential that is an image of the power supply potential. The first image circuit includes a diode and a circuit for the production of a reference current parallel-connected between a common point to which the power supply potential is applied and an output of the first image circuit connected to the positive input of the comparator. The circuit has particular utility in portable integrated circuits with very low consumption when idle such as in mobile telephony.

    摘要翻译： 当检测到电源电位的变化时产生禁止信号的禁止电路包括具有连接到产生参考电位的发生器的负输入的比较器和连接到产生第一电位的第一图像电路的输出的正输入 这是电源潜力的形象。 第一图像电路包括二极管和用于产生并联在施加电源电位的公共点与连接到比较器的正输入端的第一图像电路的输出之间的参考电流的电路。 该电路在便携式集成电路中具有特别的用途，其在空闲时具有非常低的消耗，例如在移动电话中。

    Control apparatus
    6.
    发明申请
    Control apparatus 失效
    控制装置

    公开(公告)号：US20030151313A1

    公开(公告)日：2003-08-14

    申请号：US10340070

    申请日：2003-01-10

    发明人： Mamoru Nakanishi

    IPC分类号： H02J001/00

    CPC分类号： H03K17/24 ,  H03K3/2865 ,  Y10T307/937

    摘要： A control apparatus has a momentary switch. In response to an operation performed on a momentary switch, a latch circuit (13) switches a latch output signal to be outputted to a microcomputer (11) from nullhighnull to nulllownull and keeps the latch output signal nulllownull. A capacitor (C) supplies an electric power to the latch circuit (13) when supply of the electric power is cut off. A reset circuit (15) sends a signal to the latch circuit (13) in response to an input of a high-level latch reset signal from the microcomputer (11) so that the latch circuit (13) switches the latch output signal from nulllownull to nullhighnull. If the latch output signal is nullhighnull when the microcomputer (11) detects that the switch (SW) is operated, a transistor (Tr) is turned on under the control of the microcomputer (11). If the latch output signal is nulllownull when the microcomputer (11) detects that the switch (SW) is operated, the transistor (Tr) is turned off under the control of the microcomputer (11). The microcomputer (11) outputs the high-level latch reset signal to the reset circuit.

    摘要翻译： 控制装置具有瞬时开关。 响应于对瞬时开关进行的操作，锁存电路（13）将输出到微计算机（11）的锁存输出信号从“高”切换到“低”，并且使锁存器输出信号“低”。 当电力供应被切断时，电容器（C）向闩锁电路（13）供电。 复位电路（15）响应于来自微计算机（11）的高电平锁存复位信号的输入，向闩锁电路（13）发送信号，使得锁存电路（13）将锁存输出信号从“ 低“到”高“。 当微计算机（11）检测到开关（SW）被操作时，如果闩锁输出信号为“高”，则在微型计算机（11）的控制下，晶体管（Tr）导通。 当微计算机（11）检测到开关（SW）被操作时，如果闩锁输出信号为“低”，则在微计算机（11）的控制下，晶体管（Tr）截止。 微计算机（11）将高电平锁存复位信号输出到复位电路。

    Reed relay type permanent nor memory circuit
    8.
    发明授权
    Reed relay type permanent nor memory circuit 失效
    REED继电器型永磁同步电路

    公开(公告)号：US3723767A

    公开(公告)日：1973-03-27

    申请号：US3723767D

    申请日：1971-09-27

    申请人： SQUARE D CO

    发明人： WATERS R ,  MEYER C ,  WIECZOREK R

    IPC分类号： H03K17/24 ,  G11C11/34 ,  H01H47/00 ,  H03K3/26

    CPC分类号： H03K17/24

    摘要： A circuit to be used with a transistorized logic memory which will cause the memory to be retentive when input power to the memory is interrupted and may be used in complex logic circuits, e.g., counters, shift registers, etc., which operate at high rates of speed. The retentive memory function is achieved by supplying inputs to the memory through a bistable state reed relay which causes the bistable state of the memory to correspond to the bistable state of the reed relay when power to the memory is initiated and supplying the outputs of the memory to the inputs of the reed relay which causes the bistable state of the reed relay to correspond to the bistable state of the memory when power to the memory is interrupted. The circuit is also arranged to prevent operation of the reed relay when the voltage of the direct current power source for the logic system is normal.

    摘要翻译： 与晶体管逻辑存储器一起使用的电路，当对存储器的输入电源被中断时，这将导致存储器保持性，并且可以用于以高速率操作的复杂逻辑电路，例如计数器，移位寄存器等 的速度。 通过双稳态干簧继电器向存储器提供输入来实现保持性存储功能，该双向继电器使存储器的双稳态与簧片继电器的双稳态相对应，当对存储器的供电被启动并提供存储器的输出 对于簧片继电器的输入，当对存储器的电力中断时，使干簧继电器的双稳态与存储器的双稳态相对应。 该电路还用于当逻辑系统的直流电源的电压正常时，防止干簧继电器的工作。