发明申请
US20050280451A1 Low-consumption inhibit circuit with hysteresis 有权
具有迟滞功能的低功耗抑制电路

Low-consumption inhibit circuit with hysteresis
摘要:
An inhibit circuit which produces an inhibit signal when a variation in a power supply potential is detected includes a comparator having a negative input connected to a generator producing a reference potential and a positive input connected to an output of a first image circuit producing a first potential that is an image of the power supply potential. The first image circuit includes a diode and a circuit for the production of a reference current parallel-connected between a common point to which the power supply potential is applied and an output of the first image circuit connected to the positive input of the comparator. The circuit has particular utility in portable integrated circuits with very low consumption when idle such as in mobile telephony.
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