发明申请
- 专利标题: Low-consumption inhibit circuit with hysteresis
- 专利标题(中): 具有迟滞功能的低功耗抑制电路
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申请号: US11143916申请日: 2005-06-01
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公开(公告)号: US20050280451A1公开(公告)日: 2005-12-22
- 发明人: Christophe Forel , Robert Cittadini
- 申请人: Christophe Forel , Robert Cittadini
- 优先权: FR0405904 20040602
- 主分类号: G06F1/28
- IPC分类号: G06F1/28 ; H03K17/22 ; H03K17/24 ; H03K19/00 ; H03L7/00
摘要:
An inhibit circuit which produces an inhibit signal when a variation in a power supply potential is detected includes a comparator having a negative input connected to a generator producing a reference potential and a positive input connected to an output of a first image circuit producing a first potential that is an image of the power supply potential. The first image circuit includes a diode and a circuit for the production of a reference current parallel-connected between a common point to which the power supply potential is applied and an output of the first image circuit connected to the positive input of the comparator. The circuit has particular utility in portable integrated circuits with very low consumption when idle such as in mobile telephony.
公开/授权文献
- US07420397B2 Low-consumption inhibit circuit with hysteresis 公开/授权日:2008-09-02
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