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    Phase controller apparatus and methods
    1.
    发明授权
    Phase controller apparatus and methods 有权

    公开(公告)号：US09872346B2

    公开(公告)日：2018-01-16

    申请号：US14865722

    申请日：2015-09-25

    Applicant: Cypress Semiconductor Corporation

    Inventor： Takuya Kurishita ,  Yukisato Miyazaki

    IPC: H05B33/08 ,  H03H11/22

    CPC classification number: H05B33/0815 ,  H03H11/22 ,  H05B33/0818 ,  H05B33/0845 ,  Y02B20/346

    Abstract: A phase controller includes a plurality of pulse width modulation (PWM) circuits, a plurality of switching devices, a computing unit, and a latency generator. The plurality of PWM circuits output pulse signals. The plurality of switching devices are coupled to the respective plurality of PWM circuits, and switch on and off based on the pulse signals. The computing unit calculates the pulse signals to be output from the plurality of PWM circuits, based on outputs of the plurality of switching devices. The latency generator generates latency in any of the pulse signals so that edge positions of the pulse signals output from the plurality of PWM circuits do not collide with each other, wherein the pulse signals change values at the edge positions.

    LOW POWER DIGITAL PHASE INTERPOLATOR
    5.
    发明申请
    LOW POWER DIGITAL PHASE INTERPOLATOR 有权
    低功率数字相位插补器

    公开(公告)号：US20150139377A1

    公开(公告)日：2015-05-21

    申请号：US14608111

    申请日：2015-01-28

    Applicant: Hongjiang Song

    Inventor： Hongjiang Song

    IPC: H04L7/033

    CPC classification number: H04L7/033 ,  H03C3/00 ,  H03C2200/002 ,  H03H11/20 ,  H03H11/22 ,  H03H17/08 ,  H03H2007/0192 ,  H03K17/693 ,  H04L7/0029

    Abstract: Described herein is an apparatus, method and system corresponding to relate to a low power digital phase interpolator (PI). The apparatus comprises: a digital mixer unit to generate phase signals from a series of input signals, the phase signals having phases which are digitally controlled; a poly-phase filter, coupled to the digital mixer unit, to generate a filtered signal by reducing phase error in the phase signals; and an output buffer, coupled to the poly-phase filter, to generate an output signal by buffering the filtered signal. The low power digital PI consumes less power compared to traditional current-mode PIs operating on the same power supply levels because the digital PI is independent of any bias circuit which are needed for current mode PIs.

    Abstract translation: 这里描述了对应于低功率数字相位内插器（PI）的装置，方法和系统。 该装置包括：数字混合器单元，用于从一系列输入信号产生相位信号，相位信号具有数字控制的相位; 耦合到数字混频器单元的多相滤波器，通过减少相位信号中的相位误差来产生滤波信号; 以及耦合到多相滤波器的输出缓冲器，以通过缓冲滤波的信号来产生输出信号。 与传统的电流模式PI相比，低功耗数字PI功耗要低，因为数字PI独立于当前模式PI所需的任何偏置电路。

    Variable phase amplifier circuit and method of use
    7.
    发明授权
    Variable phase amplifier circuit and method of use 有权
    可变相位放大器电路及其使用方法

    公开(公告)号：US08878619B2

    公开(公告)日：2014-11-04

    申请号：US13720560

    申请日：2012-12-19

    Applicant: Sand 9, Inc.

    Inventor： Dean A. Badillo ,  Klaus Juergen Schoepf ,  Reimund Rebel

    IPC: H03B5/30 ,  H03H11/22 ,  H03G3/00 ,  H03F3/45

    CPC classification number: H03G3/004 ,  H03B5/30 ,  H03F3/45071 ,  H03H11/22

    Abstract: A variable phase amplifier circuit is disclosed and its method of use in tuning devices having resonators. The variable phase amplifier receives an input differential signal pair. The input differential signal pair can be generated by a resonator device. The variable phase amplifier generates a modified differential signal pair in response to receiving the input differential signal pair. The variable phase amplifier provides a means to vary the phase of the modified differential signal pair with respect to the input differential signal pair, in an accurate and stable manner. If the modified differential signal pair with a phase shift introduced in it is fed back to the resonator device, the resonator will change its frequency of oscillation, where the new frequency of oscillation is a function of the phase of the modified differential signal pair.

    Abstract translation: 公开了一种可变相位放大器电路及其在具有谐振器的调谐装置中的使用方法。 可变相位放大器接收输入差分信号对。 输入差分信号对可以由谐振器装置产生。 响应于接收到输入差分信号对，可变相位放大器产生修正的差分信号对。 可变相位放大器提供了以准确和稳定的方式改变修改的差分信号对相对于输入差分信号对的相位的装置。 如果将其中引入的相移的修正的差分信号对反馈到谐振器装置，则谐振器将改变其振荡频率，其中新的振荡频率是修改的差分信号对的相位的函数。

    Apparatus and methods for quadrature clock signal generation
    8.
    发明授权
    Apparatus and methods for quadrature clock signal generation 有权
    用于正交时钟信号产生的装置和方法

    公开(公告)号：US08760209B2

    公开(公告)日：2014-06-24

    申请号：US13629170

    申请日：2012-09-27

    Applicant: Analog Devices, Inc.

    Inventor： Robert Schell ,  John Kenney ,  Wei-Hung Chen

    IPC: H03K3/00 ,  H03H11/16 ,  H03K5/13

    CPC classification number: H03H7/06 ,  H03B27/00 ,  H03H7/20 ,  H03H7/21 ,  H03H11/22 ,  H03H2007/0192 ,  H04L7/0025 ,  H04L7/033

    Abstract: Apparatus and methods for quadrature clock signal generation are provided. In certain implementations, a quadrature clock signal generator includes a sine-shaping filter and a polyphase filter. The sine-shaping filter can receive an input clock signal such as a square or rectangular wave and can filter the input clock signal to generate a sinusoidal clock signal. Additionally, the polyphase filter can use the sinusoidal clock signal to generate in-phase (I) and quadrature-phase (Q) clock signals, which can have a phase difference of about ninety degrees. In certain configurations, the in-phase and quadrature-phase clock signals generated by the polyphase filter can be buffered by a buffer circuit to generate in-phase and quadrature-phase sinusoidal reference clock signals suitable for use in a clock and data recover (CDR) system.

    Abstract translation: 提供了正交时钟信号生成的装置和方法。 在某些实现中，正交时钟信号发生器包括正弦整形滤波器和多相滤波器。 正弦整形滤波器可以接收诸如正方形或矩形波的输入时钟信号，并且可以对输入时钟信号进行滤波以产生正弦时钟信号。 此外，多相滤波器可以使用正弦时钟信号来产生可以具有大约九十度的相位差的同相（I）和正交相（Q）时钟信号。 在某些配置中，由多相滤波器产生的同相和正交相位时钟信号可由缓冲电路缓冲，以产生适合在时钟和数据恢复中使用的同相和正交相位正弦参考时钟信号（CDR ）系统。

    LOW POWER DIGITAL PHASE INTERPOLATOR
    9.
    发明申请
    LOW POWER DIGITAL PHASE INTERPOLATOR 有权
    低功率数字相位插补器

    公开(公告)号：US20140146932A1

    公开(公告)日：2014-05-29

    申请号：US13994627

    申请日：2011-12-21

    Applicant: Hongjiang Song

    Inventor： Hongjiang Song

    IPC: H04L7/00

    CPC classification number: H04L7/033 ,  H03C3/00 ,  H03C2200/002 ,  H03H11/20 ,  H03H11/22 ,  H03H17/08 ,  H03H2007/0192 ,  H03K17/693 ,  H04L7/0029

    Abstract: Described herein is an apparatus, method and system corresponding to relate to a low power digital phase interpolator (PI). The apparatus comprises: a digital mixer unit to generate phase signals from a series of input signals, the phase signals having phases which are digitally controlled; a poly-phase filter, coupled to the digital mixer unit, to generate a filtered signal by reducing phase error in the phase signals; and an output buffer, coupled to the poly-phase filter, to generate an output signal by buffering the filtered signal. The low power digital PI consumes less power compared to traditional current-mode PIs operating on the same power supply levels because the digital PI is independent of any bias circuit which are needed for current mode PIs.

    Abstract translation: 这里描述了对应于低功率数字相位内插器（PI）的装置，方法和系统。 该装置包括：数字混合器单元，用于从一系列输入信号产生相位信号，相位信号具有数字控制的相位; 耦合到数字混频器单元的多相滤波器，通过减少相位信号中的相位误差来产生滤波信号; 以及耦合到多相滤波器的输出缓冲器，以通过缓冲滤波的信号来产生输出信号。 与传统的电流模式PI相比，低功耗数字PI功耗要低，因为数字PI独立于当前模式PI所需的任何偏置电路。

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