Abstract:
A temperature-compensated oscillator includes a resonator element, an oscillating circuit, and a temperature compensation circuit, and a frequency deviation with respect to a frequency at a time point when power supply starts is within a range of ±8 ppb at a time point when 10 seconds elapse from when the power supply starts, within a range of ±10 ppb at a time point when 20 seconds elapse from when the power supply starts, and within a range of ±10 ppb at a time point when 30 seconds elapse from when the power supply starts.
Abstract:
Technologies are generally described for quadrature-based injection-locking of ring oscillators. In some examples, an external signal may be injected into a ring oscillator. Phase signals may be measured from within the ring oscillator and used to determine a mean quadrature error (MQE) that characterizes the difference in frequency between the external signal and the ring oscillator's natural frequency. A control signal may then be generated from the MQE and used to adjust the ring oscillator natural frequency to reduce the difference between the ring oscillator natural frequency and the external signal.
Abstract:
A circuit including a tank circuit, a pair of transistors, a bias circuit, and a capacitor. The transistors include (i) drain terminals coupled to the tank circuit, (ii) source terminals coupled to each other, and (iii) gate terminals cross-coupled to the drain terminals via a pair of capacitors. The bias circuit is coupled to the gates of the pair of transistors to i) alternatingly turn on the pair of transistors during a plurality of peaks of an oscillating signal of the tank circuit, and ii) turn off the pair of transistors during a plurality of crossing points of the oscillating signal. The capacitor is coupled to (i) the tank circuit and (ii) the pair of transistors.
Abstract:
According to one embodiment, a phase locked loop (PLL) circuit includes an application unit, a correlator, an integrator and a power supply noise canceller. The application unit applies the test signal to a power supply voltage. The correlator extracts a frequency error signal as a monitor signal and calculates a correlation value for the test signal and the monitor signal to generate a correlation signal. The integrator integrates the correlation signal to generate an integral signal. The power supply noise canceller provides a cancellation gain corresponding to the integral signal to the power supply voltage to which the test signal is applied, to generate a control signal.
Abstract:
In a three-band switching oscillator, a switching circuit is provided to switch the operating conditions of first and second voltage-controlled oscillator and to switching an oscillation frequency band of said first voltage-controlled oscillator, and is composed of a first switch for supplying a current to place the first voltage-controlled oscillator into operation, a second switch for supplying a current to place the second voltage-controlled oscillator into operation, and first and second switching terminals for receiving switching voltages. The switching circuit switches the first switch in accordance with a switching voltage inputted to the first switching terminal and switches an oscillation frequency band in accordance with a switching voltage inputted to the second switching terminal, while only when a high-level switching voltage is inputted to the second switching terminal, the second switch is placed into an open condition by a high-level switching voltage inputted to the first switching terminal and placed into a closed condition by a low-level switching voltage inputted thereto, and when a low-level switching voltage is inputted to the second switching terminal, the second switch is placed into the open condition irrespective of the switching voltage inputted to the first switching terminal.
Abstract:
The present invention relates to a frequency generator arrangement having an oscillator for generating an oscillator signal having an oscillator frequency and an oscillator output for outputting the oscillator signal, the frequency generator arrangement further comprising a frequency multiplier coupled and/or connected to an oscillator output for generating an output signal of the frequency generator arrangement having a multiplier frequency corresponding to a multiple of the oscillator frequency, wherein the frequency multiplier comprises a frequency multiplier core directly causative of the frequency multiplication, the frequency multiplier core having a power supply, and the frequency generator arrangement having a control input for controlling the power supply to the frequency multiplier core, whereby an output power of the output signal is adjustable by controlling the power supply to the frequency multiplier core.
Abstract:
To prevent an undesired operating mode of voltage-controlled oscillation (VCO) circuitry from dominating a desired operating mode (e.g., an in-phase operating mode or an out-of-phase operating mode), a supply reset and ramp pulse may be provided to the VCO circuitry when switching to a new mode, such that supply voltage to the VCO circuitry is reset (e.g., set to 0 V or another reference voltage), and gradually increased or ramped up back to a steady-state voltage (e.g., used to maintain a mode) within a time duration. Additionally or alternatively, a switch control bootstrap pulse may be provided to the VCO circuitry that is bootstrapped to (e.g., applied instantaneously or concurrently with) switching the VCO circuitry to the new mode. After a time duration, the VCO circuitry may switch back to a steady-state voltage (e.g., used to maintain the new mode).
Abstract:
High-speed CMOS ring voltage controlled oscillators with low supply sensitivity have been disclosed. According to one embodiment, a CML ring oscillator comprises a CML negative impedance compensation circuit comprising two cross coupled transistors and a resistor connected to the two transistors for resistive biasing and a CML interpolating delay cell connected in parallel with the CML negative impedance compensation. An impedance change of the CML negative impedance compensation due to supply variation counteracts an impedance change of the CML interpolating delay cell.
Abstract:
An oscillation circuit includes a temperature compensating section to which electric power is supplied from a main power supply and a backup power supply, an oscillating section, a function of which is compensated by a signal from the temperature compensating section, and a switch and a power-supply monitoring circuit configured to select, when the temperature compensating section is not operating, at least one of the main power supply and the backup power supply and control connection to the temperature compensating section.
Abstract:
An LC oscillator is provided that achieves improved phase noise performance. A variable frequency oscillator includes a variable supply source, an oscillator tank circuit, a variable capacitance circuit comprising MOS switches, and an oscillator tank voltage common mode adjustment circuit. When the capacitance of the variable capacitance circuit is varied to vary an output frequency of the variable frequency oscillator, the common mode voltage is adjusted to reduce transitions of the MOS switches between an inversion state and a depletion state during excursions of an output signal through one cycle of oscillation.