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公开(公告)号：US20240357733A1
公开(公告)日：2024-10-24
申请号：US18303486
申请日：2023-04-19
Applicant: Apple Inc.
Inventor： Behzad Biglarbegian , Hongrui Wang , Abbas Komijani , Reetika K Agarwal
CPC classification number: H05K1/0243 , H01P3/08 , H05K2201/10015 , H05K2201/1003 , H05K2201/10075
Abstract: An electronic device may include a transceiver with a substrate and an inductor on the substrate. A ring of ground traces may surround the inductor. Circuit components may be patterned onto the substrate overlapping the inductor, a region of the substrate surrounded by the inductor, and/or a region of the substrate between the inductor and the ring. The components may be arranged in trees with feed lines extending radially outward from a central axis. The components in each tree may be separated from the capacitors in other trees by gaps, preventing eddy currents on the trees. The components may be used to form bypass capacitors for power supply lines, a low-dropout regulator load, part of the loop filter of a phase-locked loop, or other portions of the transceiver. The components may thereby be used to convey signals while also meeting fill factor requirements associated with fabrication of the substrate.
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公开(公告)号：US12009847B2
公开(公告)日：2024-06-11
申请号：US17950053
申请日：2022-09-21
Applicant: Apple Inc.
Inventor： Hongrui Wang , Abbas Komijani , Xinhua Chen
IPC: H04B1/04
CPC classification number: H04B1/04 , H04B2001/0408
Abstract: Embodiments presented herein provide apparatus and techniques to reduce a direct current (DC) voltage offset between a transmitter and receiver. Embodiments include a shared reference voltage signal generated by a reference voltage source. The receiver may include a first unit gain buffer to receive a reference voltage signal from the reference voltage source. The transmitter may be communicatively coupled to the receiver via one or more connections and may include a second unit gain buffer communicatively coupled to the first unit gain buffer via one of the connections. An amplifier (e.g., an operation amplifier) of the transmitter may include multiple positive inputs coupled to the second unit gain buffer and an offset tracker. The offset tracker may compensate for a DC offset caused by at least a power supply and/or a ground bounce.
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3.发明授权公开(公告)号：US11955979B2
公开(公告)日：2024-04-09
申请号：US17835292
申请日：2022-06-08
Applicant: Apple Inc.
Inventor： Reetika K Agarwal , Abbas Komijani , Hongrui Wang
CPC classification number: H03L7/0891 , H03C3/0941 , H03L7/091 , H03L7/099 , H03L7/185 , H03L7/1976 , H04L7/033
Abstract: An electronic device may include wireless circuitry having mixer circuitry configured to receive oscillator signals from a partial-fractional phase-locked loop (PLL). The partial-fractional PLL may include a phase frequency detector, a charge pump, a loop filter, and a frequency divider connected in a loop. To implement the partial-fractional capability of the PLL, the frequency divider may receive a bitstream from a first order sigma delta modulator and a finite impulse response filter. The first order sigma delta modulator may output a periodic non-randomized output. The finite impulse response filter may increase the frequency of toggling of the periodic non-randomized output. Configured and operated in this way, the partial-fractional PLL can exhibit reduced phase noise.
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公开(公告)号：US11955796B2
公开(公告)日：2024-04-09
申请号：US17661503
申请日：2022-04-29
Applicant: Apple Inc.
Inventor： Junjun Li , Abbas Komijani , Hongrui Wang
CPC classification number: H02H9/046 , H01L27/0255
Abstract: An output circuit included in an integrated circuit may employ multiple protection circuits to protect driver devices from damage during an electrostatic discharge event. One protection circuit clamps a signal port to a ground supply node upon detection of the electrostatic discharge event. Another protection circuit increases the voltage level of a control terminal to one of the driver devices during the electrostatic discharge event to reduce the voltage across the driver device and prevent damage to the device.
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公开(公告)号：US11906998B2
公开(公告)日：2024-02-20
申请号：US17483005
申请日：2021-09-23
Applicant: Apple Inc.
Inventor： Reetika Kumari Agarwal , Abbas Komijani
Abstract: Embodiments disclosed herein relate to a low-voltage dropout regulator and more specifically to improving a power supply rejection ratio (PSRR) of the low dropout voltage regulator. The low dropout voltage regulator may be used to generate various voltages for integrated circuits of an electronic device. In some cases, a P-type metal-oxide-semiconductor (PMOS) low dropout (LDO) voltage regulator may be used. However, the PMOS LDO may not provide a sufficient PSRR or reduction in supply noise. To address these issues, an N-type metal-oxide-semiconductor (NMOS) LDO voltage regulator having an NMOS pass transistor may be used. The NMOS LDO may provide a lower impedance than the PMOS LDO. Further, the NMOS LDO may provide an increased bandwidth and consume a smaller physical area than the PMOS LDO.
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Patent Agency Ranking
公开(公告)号：US20230091463A1
公开(公告)日：2023-03-23
申请号：US17942850
申请日：2022-09-12
Applicant: Apple Inc.
Inventor： Hongrui Wang , Abbas Komijani
Abstract: To prevent an undesired operating mode of voltage-controlled oscillation (VCO) circuitry from dominating a desired operating mode (e.g., an in-phase operating mode or an out-of-phase operating mode), a supply reset and ramp pulse may be provided to the VCO circuitry when switching to a new mode, such that supply voltage to the VCO circuitry is reset (e.g., set to 0 V or another reference voltage), and gradually increased or ramped up back to a steady-state voltage (e.g., used to maintain a mode) within a time duration. Additionally or alternatively, a switch control bootstrap pulse may be provided to the VCO circuitry that is bootstrapped to (e.g., applied instantaneously or concurrently with) switching the VCO circuitry to the new mode. After a time duration, the VCO circuitry may switch back to a steady-state voltage (e.g., used to maintain the new mode).
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公开(公告)号：US20230006745A1
公开(公告)日：2023-01-05
申请号：US17941975
申请日：2022-09-09
Applicant: Apple Inc.
Inventor： Hongrui Wang , Abbas Komijani , Saihua Lin , Sohrab Emami-Neyestanak
IPC: H04B17/21 , H04B17/345 , H03B5/18
Abstract: An electronic device may include a harmonic rejection mixer with a delay line, mixer array, and load. The delay line may generate LO phases. Each mixer in the array may have a first input that receives an LO phase and a second input coupled to an input switch and the first input of the next mixer circuit through an inter-mixer switch. The load may include a set of switches. In a transmit mode, the input switches and set of switches may be closed while the inter-mixer switches are open. In a self-calibration mode, the input switches and set of switches may be open while the inter-mixer switches are closed. A controller may sweep through phase codes for the programmable delay line while storing a digital output from the load. The controller may calibrate the phase code based on the digital output.
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公开(公告)号：US11495389B2
公开(公告)日：2022-11-08
申请号：US15930084
申请日：2020-05-12
Applicant: Apple Inc.
Inventor： Hongrui Wang , Saihua Lin , Abbas Komijani , Sohrab Emami-Neyestanak
Abstract: Radio frequency filtering circuitry blocks certain frequencies in an outgoing signal so that the signal may be transmitted over a desired frequency. The radio frequency filtering circuitry includes a first inductor having a first coil and a second inductor coupled to and disposed within the first coil. The second inductor has a second coil and a third coil symmetrical to the second coil. When current is applied to the radio frequency filtering circuitry, the current in the second coil causes a first induced current in the first coil and the current in the third coil causes a second induced current in the first coil, wherein the second induced current is approximately equal in magnitude and opposite in direction to the first induced current. As such, the second induced current may compensate for the first induced current.
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公开(公告)号：US20220200709A1
公开(公告)日：2022-06-23
申请号：US17692756
申请日：2022-03-11
Applicant: Apple Inc.
Inventor： Hongrui Wang , Abbas Komijani , Saihua Lin , Sohrab Emami-Neyestanak
IPC: H04B17/21 , H03B5/18 , H04B17/345
Abstract: An electronic device may include a harmonic rejection mixer with a delay line, mixer array, and load. The delay line may generate LO phases. Each mixer in the array may have a first input that receives an LO phase and a second input coupled to an input switch and the first input of the next mixer circuit through an inter-mixer switch. The load may include a set of switches. In a transmit mode, the input switches and set of switches may be closed while the inter-mixer switches are open. In a self-calibration mode, the input switches and set of switches may be open while the inter-mixer switches are closed. A controller may sweep through phase codes for the programmable delay line while storing a digital output from the load. The controller may calibrate the phase code based on the digital output.
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公开(公告)号：US20220200529A1
公开(公告)日：2022-06-23
申请号：US17516532
申请日：2021-11-01
Applicant: Apple Inc.
Inventor： Abbas Komijani , Hongrui Wang , Sohrab Emami-Neyestanak
IPC: H03B5/12
Abstract: An electronic device may include a transceiver with mixer circuitry that up-converts or down-converts signals based on a voltage-controlled oscillator (VCO) signal. The transceiver circuitry may include first, second, third, and fourth VCOs. Each VCO may include a VCO core that receives a control voltage and an inductor coupled to the VCO core. Fixed linear capacitors may be coupled between the VCO cores. A switching network may be coupled between the VCOs. Control circuitry may place the VCO circuitry in one of four different operating modes and may switch between the operating modes to selectively control current direction in each of the inductors. The VCO circuitry may generate the VCO signal within a respective frequency range in each of the operating modes. The VCO circuitry may exhibit a relatively wide frequency range across all of the operating modes while introducing minimal phase noise to the system.
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