公开(公告)号：US10008611B2

公开(公告)日：2018-06-26

申请号：US15321975

申请日：2015-06-24

申请人： JOLED INC.

发明人： Mitsutaka Matsumoto ,  Arinobu Kanegae

IPC分类号： H01L29/08 ,  H01L29/786 ,  H01L29/24 ,  H01L29/66 ,  H01L21/383 ,  H01L21/385 ,  H01L27/32 ,  H01L27/12

CPC分类号： H01L29/7869 ,  H01L21/383 ,  H01L21/385 ,  H01L21/471 ,  H01L21/473 ,  H01L27/1225 ,  H01L27/1266 ,  H01L27/3262 ,  H01L29/24 ,  H01L29/66969 ,  H01L29/78603 ,  H01L29/78696 ,  H01L51/50

摘要： A thin film transistor includes: a substrate; an undercoat layer disposed on the substrate; an oxide semiconductor layer formed above the undercoat layer and including at least indium; a gate insulating layer located opposite the undercoat layer with the oxide semiconductor layer being between the gate insulating layer and the undercoat layer; a gate electrode located opposite the oxide semiconductor layer with the gate insulating layer being between the gate electrode and the oxide semiconductor layer; and a source electrode and a drain electrode electrically connected to the oxide semiconductor layer, wherein fluorine is included in a region which is an internal region in the oxide semiconductor layer and is close to the undercoat layer.

公开(公告)号：US09853245B2

公开(公告)日：2017-12-26

申请号：US14608798

申请日：2015-01-29

申请人： Samsung Display Co., Ltd.

发明人： Jin-Kwang Kim ,  Sang-Joon Seo ,  Seung-Hun Kim ,  Seongmin Wang

IPC分类号： H01L51/52 ,  H01L51/56 ,  H01L51/05 ,  H01L23/31 ,  H01L21/033 ,  H01L51/50 ,  H01L21/027 ,  H01L21/471 ,  H01L21/02 ,  H01L27/32

CPC分类号： H01L51/5256 ,  H01L21/02365 ,  H01L21/0271 ,  H01L21/033 ,  H01L21/0332 ,  H01L21/471 ,  H01L23/3192 ,  H01L27/3246 ,  H01L51/0533 ,  H01L51/50 ,  H01L51/5064 ,  H01L51/508 ,  H01L51/5253

摘要： An organic light emitting diode (OLED) display includes: a substrate; an organic light emitting diode formed on the substrate; a metal oxide layer formed on the substrate and covering the organic light emitting diode; a first inorganic layer formed on the metal oxide layer and covering a relatively larger area than the metal oxide layer; a first organic layer formed on the first inorganic layer and covering a relatively smaller area than the first inorganic layer; and a second inorganic layer formed on the first organic layer, covering a relatively larger area than the first organic layer, and contacting the first inorganic layer at an edge of the second inorganic layer.

公开(公告)号：US09177973B2

公开(公告)日：2015-11-03

申请号：US14496503

申请日：2014-09-25

申请人： LG DISPLAY CO., LTD.

发明人： Chang Bum Park

IPC分类号： H01L29/04 ,  H01L31/036 ,  H01L31/0376 ,  H01L31/20 ,  H01L27/12 ,  H01L21/47 ,  H01L21/471 ,  H01L21/4757

CPC分类号： H01L27/124 ,  H01L21/47 ,  H01L21/471 ,  H01L21/4757 ,  H01L27/1218 ,  H01L27/1225 ,  H01L27/1259 ,  H01L27/1262

摘要： A flexible display device includes: a flexible substrate having a lower substrate including a prominence pattern, a barrier layer pattern on the prominence pattern, and a planarization film; a gate line on the flexible substrate; a data line crossing the gate line with having a gate insulation film therebetween to define a pixel region; a thin film transistor formed at an intersection of the gate line and the data line; and a passivation layer on the flexible substrate including the thin film transistor. With this configuration, the flexible substrate and the flexible display device can be enhanced by preventing property deterioration of the elements due to bending stresses.

摘要翻译： 柔性显示装置包括：柔性基板，具有包括突出图案的下基板，突出图案上的阻挡层图案和平坦化膜; 柔性基板上的栅极线; 与栅极线交叉的数据线，其间具有栅极绝缘膜，以限定像素区域; 形成在栅极线和数据线的交点处的薄膜晶体管; 以及在包括薄膜晶体管的柔性基板上的钝化层。 利用这种构造，可以通过防止由于弯曲应力引起的元件的特性劣化来增强柔性基板和柔性显示装置。

公开(公告)号：US20150091005A1

公开(公告)日：2015-04-02

申请号：US14496503

申请日：2014-09-25

申请人： LG DISPLAY CO., LTD.

发明人： Chang Bum PARK

IPC分类号： H01L27/12 ,  H01L21/471 ,  H01L21/4757 ,  H01L21/47

CPC分类号： H01L27/124 ,  H01L21/47 ,  H01L21/471 ,  H01L21/4757 ,  H01L27/1218 ,  H01L27/1225 ,  H01L27/1259 ,  H01L27/1262

摘要： A flexible display device includes: a flexible substrate having a lower substrate including a prominence pattern, a barrier layer pattern on the prominence pattern, and a planarization film; a gate line on the flexible substrate; a data line crossing the gate line with having a gate insulation film therebetween to define a pixel region; a thin film transistor formed at an intersection of the gate line and the data line; and a passivation layer on the flexible substrate including the thin film transistor. With this configuration, the flexible substrate and the flexible display device can be enhanced by preventing property deterioration of the elements due to bending stresses.

摘要翻译： 柔性显示装置包括：柔性基板，具有包括突出图案的下基板，突出图案上的阻挡层图案和平坦化膜; 柔性基板上的栅极线; 与栅极线交叉的数据线，其间具有栅极绝缘膜，以限定像素区域; 形成在栅极线和数据线的交点处的薄膜晶体管; 以及在包括薄膜晶体管的柔性基板上的钝化层。 利用这种构造，可以通过防止由于弯曲应力引起的元件的特性劣化来增强柔性基板和柔性显示装置。

公开(公告)号：US20140374751A1

公开(公告)日：2014-12-25

申请号：US14478172

申请日：2014-09-05

申请人： InnoLux Corporation

发明人： Hsin-Hung LIN ,  Jung-Fang CHANG ,  Ker-Yih KAO

IPC分类号： H01L29/786 ,  H01L27/12

CPC分类号： H01L27/1225 ,  H01L21/441 ,  H01L21/47 ,  H01L21/471 ,  H01L21/47573 ,  H01L23/3171 ,  H01L23/481 ,  H01L27/1259 ,  H01L29/41733 ,  H01L29/41775 ,  H01L29/517 ,  H01L29/518 ,  H01L29/66742 ,  H01L29/66969 ,  H01L29/78606 ,  H01L29/7869 ,  H01L2924/0002 ,  H01L2924/00

摘要： Disclosed is a thin film transistor including a gate electrode on a substrate. A gate dielectric layer is disposed on the gate electrode and the substrate, and source/drain electrodes are disposed on the gate dielectric layer overlying two edge parts of the gate electrode. A channel layer is disposed on the gate dielectric layer overlying a center part of the gate electrode, and the channel region contacts the source/drain electrodes. An insulating capping layer overlies the channel layer, wherein the channel layer includes an oxide semiconductor.

摘要翻译： 公开了一种在基板上包括栅电极的薄膜晶体管。 栅极电介质层设置在栅电极和衬底上，源极/漏电极设置在覆盖栅电极的两个边缘部分的栅极电介质层上。 沟道层设置在覆盖栅极电极的中心部分的栅极电介质层上，沟道区域与源极/漏极接触。 绝缘覆盖层覆盖在沟道层上，其中沟道层包括氧化物半导体。

公开(公告)号：US20120119211A1

公开(公告)日：2012-05-17

申请号：US13288579

申请日：2011-11-03

申请人： Hsin-Hung Lin ,  Jung-Fang Chang ,  Ker-Yih Kao

发明人： Hsin-Hung Lin ,  Jung-Fang Chang ,  Ker-Yih Kao

IPC分类号： H01L29/786 ,  H01L21/336

CPC分类号： H01L27/1225 ,  H01L21/441 ,  H01L21/47 ,  H01L21/471 ,  H01L21/47573 ,  H01L23/3171 ,  H01L23/481 ,  H01L27/1259 ,  H01L29/41733 ,  H01L29/41775 ,  H01L29/517 ,  H01L29/518 ,  H01L29/66742 ,  H01L29/66969 ,  H01L29/78606 ,  H01L29/7869 ,  H01L2924/0002 ,  H01L2924/00

摘要： Disclosed is a thin film transistor including a gate electrode on a substrate. A gate dielectric layer is disposed on the gate electrode and the substrate, and source/drain electrodes are disposed on the gate dielectric layer overlying two edge parts of the gate electrode. A channel layer is disposed on the gate dielectric layer overlying a center part of the gate electrode, and the channel region contacts the source/drain electrodes. An insulating capping layer overlies the channel layer, wherein the channel layer includes an oxide semiconductor.

摘要翻译： 公开了一种在基板上包括栅电极的薄膜晶体管。 栅极电介质层设置在栅电极和衬底上，源极/漏电极设置在覆盖栅电极的两个边缘部分的栅极电介质层上。 沟道层设置在覆盖栅极电极的中心部分的栅极电介质层上，沟道区域与源极/漏极接触。 绝缘覆盖层覆盖在沟道层上，其中沟道层包括氧化物半导体。

公开(公告)号：US4465565A

公开(公告)日：1984-08-14

申请号：US479545

申请日：1983-03-28

申请人： Kenneth R. Zanio

发明人： Kenneth R. Zanio

IPC分类号： C25D5/02 ,  C25D9/08 ,  H01L21/368 ,  H01L21/471 ,  H01L31/0216 ,  H01L31/18 ,  C25D7/12

CPC分类号： C25D9/08 ,  C25D5/02 ,  H01L21/02411 ,  H01L21/02562 ,  H01L21/02576 ,  H01L21/02579 ,  H01L21/02628 ,  H01L21/471 ,  H01L31/0216 ,  H01L31/1832 ,  Y10S205/915

摘要： A thin passivating layer (14) of CdTe is formed on a layer of photoconductive HgCdTe (4) by means of electrochemical deposition. The photoconductive layer (4) is used as a cathode. A first anode (26) is fabricated of tellurium and a second anode (28) is fabricated of an inert substance such as graphite. An electrolyte (30) comprises an aqueous solution of CdSO.sub.4 and unsaturated TeO.sub.2. Alternatively, electrolyte (30) can be saturated with TeO.sub.2, in which case a first anode is fabricated of an inert substance, and an optional second anode is fabricated of cadmium. After purifying the cathode (1) and the electrolyte (30), cadmium and tellurium are simultaneously deposited upon cathode (1). Stoichiometric balance is maintained to maximize the resistivity of the passivating CdTe layer (14). This is accomplished by regulating the deposition voltage of cathode (1) with respect to a saturated calomel electrode (22). In a first embodiment, an n-type region (16) is formed in the p-type photoconductive layer (4) subsequent to electrochemical deposition of the passivating CdTe layer (14). In a second embodiment, the n-type region (16) is formed in the p-type layer (4) prior to electrochemical deposition of the CdTe passivating layer (14).

摘要翻译： 通过电化学沉积在一层光导的HgCdTe（4）上形成一个CdTe薄的钝化层（14）。 光电导层（4）用作阴极。 第一阳极（26）由碲制成，第二阳极（28）由惰性物质如石墨制成。 电解质（30）包含CdSO 4水溶液和不饱和TeO 2。 或者，电解质（30）可以用TeO 2饱和，在这种情况下，第一阳极由惰性物质制成，并且任选的第二阳极由镉制成。 纯化阴极（1）和电解质（30）后，镉和碲同时沉积在阴极（1）上。 维持化学计量平衡以使钝化CdTe层（14）的电阻率最大化。 这通过调节阴极（1）相对于饱和甘汞电极（22）的沉积电压来实现。 在第一实施例中，在钝化CdTe层（14）的电化学沉积之后，在p型光电导层（4）中形成n型区域（16）。 在第二实施例中，在电化学沉积CdTe钝化层（14）之前，在p型层（4）中形成n型区域（16）。

公开(公告)号：US4447291A

公开(公告)日：1984-05-08

申请号：US528206

申请日：1983-08-31

申请人： Eric Schulte

发明人： Eric Schulte

IPC分类号： H01L21/465 ,  H01L21/471 ,  H01L21/473 ,  H01L29/221 ,  H01L31/113 ,  H01L21/306 ,  B44C1/22 ,  C03C15/00 ,  C03C25/06

CPC分类号： H01L27/14696 ,  H01L21/465 ,  H01L21/471 ,  H01L21/473 ,  H01L29/221 ,  H01L31/113

摘要： A via formation process for HgCdTe (i.e., for pseudo-binary alloys of HgTe and CdTe). Photoresist is patterned on the HgCdTe surface, and ion milling is used to cut holes in the HgCdTe as defined by the photoresist. With this photoresist still in place, the HgCdTe is wet etched to smooth the via walls and expand the via size to a precise dimension.

摘要翻译： 用于HgCdTe的通孔形成方法（即，用于HgTe和CdTe的伪二元合金）。 光刻胶在HgCdTe表面上图案化，离子铣削用于切割由光刻胶定义的HgCdTe中的孔。 使用这种光致抗蚀剂仍然存在，HgCdTe被湿蚀刻以使通孔平滑并将通孔尺寸扩大到精确的尺寸。

公开(公告)号：US09368631B2

公开(公告)日：2016-06-14

申请号：US14478148

申请日：2014-09-05

申请人： InnoLux Corporation

发明人： Hsin-Hung Lin ,  Jung-Fang Chang ,  Ker-Yih Kao

IPC分类号： H01L21/00 ,  H01L29/786 ,  H01L29/66 ,  H01L27/12 ,  H01L23/31 ,  H01L23/48 ,  H01L29/417 ,  H01L29/51 ,  H01L21/441 ,  H01L21/47 ,  H01L21/471 ,  H01L21/4757

CPC分类号： H01L27/1225 ,  H01L21/441 ,  H01L21/47 ,  H01L21/471 ,  H01L21/47573 ,  H01L23/3171 ,  H01L23/481 ,  H01L27/1259 ,  H01L29/41733 ,  H01L29/41775 ,  H01L29/517 ,  H01L29/518 ,  H01L29/66742 ,  H01L29/66969 ,  H01L29/78606 ,  H01L29/7869 ,  H01L2924/0002 ,  H01L2924/00

摘要： Disclosed is a thin film transistor including a gate electrode on a substrate. A gate dielectric layer is disposed on the gate electrode and the substrate, and source/drain electrodes are disposed on the gate dielectric layer overlying two edge parts of the gate electrode. A channel layer is disposed on the gate dielectric layer overlying a center part of the gate electrode, and the channel region contacts the source/drain electrodes. An insulating capping layer overlies the channel layer, wherein the channel layer includes an oxide semiconductor.

公开(公告)号：US09362408B2

公开(公告)日：2016-06-07

申请号：US14478172

申请日：2014-09-05

申请人： InnoLux Corporation

发明人： Hsin-Hung Lin ,  Jung-Fang Chang ,  Ker-Yih Kao

IPC分类号： H01L21/00 ,  H01L29/786 ,  H01L29/66 ,  H01L27/12 ,  H01L23/31 ,  H01L23/48 ,  H01L29/417 ,  H01L29/51 ,  H01L21/441 ,  H01L21/47 ,  H01L21/471 ,  H01L21/4757

CPC分类号： H01L27/1225 ,  H01L21/441 ,  H01L21/47 ,  H01L21/471 ,  H01L21/47573 ,  H01L23/3171 ,  H01L23/481 ,  H01L27/1259 ,  H01L29/41733 ,  H01L29/41775 ,  H01L29/517 ,  H01L29/518 ,  H01L29/66742 ,  H01L29/66969 ,  H01L29/78606 ,  H01L29/7869 ,  H01L2924/0002 ,  H01L2924/00

摘要： Disclosed is a thin film transistor including a gate electrode on a substrate. A gate dielectric layer is disposed on the gate electrode and the substrate, and source/drain electrodes are disposed on the gate dielectric layer overlying two edge parts of the gate electrode. A channel layer is disposed on the gate dielectric layer overlying a center part of the gate electrode, and the channel region contacts the source/drain electrodes. An insulating capping layer overlies the channel layer, wherein the channel layer includes an oxide semiconductor.

摘要翻译： 公开了一种在基板上包括栅电极的薄膜晶体管。 栅极电介质层设置在栅电极和衬底上，源极/漏电极设置在覆盖栅电极的两个边缘部分的栅极电介质层上。 沟道层设置在覆盖栅极电极的中心部分的栅极电介质层上，沟道区域与源极/漏极接触。 绝缘覆盖层覆盖在沟道层上，其中沟道层包括氧化物半导体。