公开(公告)号：US20240161793A1

公开(公告)日：2024-05-16

申请号：US18115999

申请日：2023-03-01

Applicant: SK hynix Inc.

Inventor： Heon Ki KIM ,  Kyeong Min CHAE

IPC: G11C7/10 ,  G11C7/22

CPC classification number: G11C7/1063 ,  G11C7/106 ,  G11C7/1066 ,  G11C7/222

Abstract: A pipe register includes: a plurality of register units configured to output data in response to control signals; and a pipe control circuit configured to generate a reference timing signal by dividing a clock signal, the clock signal activated during an activation time of a read enable signal, and generate the control signals based on the read enable signal and the reference timing signal.

公开(公告)号：US20240012568A1

公开(公告)日：2024-01-11

申请号：US17991082

申请日：2022-11-21

Applicant: SK hynix Inc.

Inventor： Sung Yong LIM

IPC: G06F3/06

CPC classification number: G06F3/0619 ,  G06F3/064 ,  G06F3/0653 ,  G06F3/0679

Abstract: There are provided a memory device and an operating method of the memory device. The memory device includes: a memory block including first select transistors, memory cells, and second select transistors, which are connected between bit lines and a source line; a precharge controller for monitoring a program operation of the memory cells, and changing a precharge mode of unselected strings among strings included in the memory block according to a monitoring result; and a select line voltage generator for generating a positive voltage or a negative voltage, which is applied to a second select line connected to the second select transistors, according to the precharge mode selected in the precharge controller.

公开(公告)号：US20190288116A1

公开(公告)日：2019-09-19

申请号：US16188290

申请日：2018-11-13

Applicant: SK hynix Inc.

Inventor： Hyangkeun YOO

IPC: H01L29/78 ,  H01L29/51 ,  H01L29/16 ,  H01L29/161

Abstract: A ferroelectric memory device according to one embodiment includes a semiconductor substrate, a channel layer disposed on the semiconductor substrate, a ferroelectric layer disposed on the channel layer, and a gate electrode layer disposed on the ferroelectric layer. The channel layer includes an epitaxial film.

公开(公告)号：US20250071995A1

公开(公告)日：2025-02-27

申请号：US18943125

申请日：2024-11-11

Applicant: SK hynix Inc.

Inventor： Won Geun CHOI ,  Jung Shik JANG ,  Jang Won KIM ,  Mi Seong PARK

IPC: H10B43/27 ,  H10B41/10 ,  H10B41/20 ,  H10B41/27 ,  H10B43/10 ,  H10B63/00 ,  H10B99/00

Abstract: There are provided a memory device and a manufacturing method of the memory device. The memory device includes: a first gate stack structure and a second gate stack structure, disposed on a substrate; and a slit disposed between the first gate stack structure and the second gate stack structure to electrically isolate the first gate stack structure and the second gate stack structure from each other.

公开(公告)号：US20250071989A1

公开(公告)日：2025-02-27

申请号：US18534744

申请日：2023-12-11

Applicant: SK hynix Inc.

Inventor： Seok Min CHOI ,  Jung Shik JANG ,  Rho Gyu KWAK ,  In Su PARK ,  Won Geun CHOI ,  Jung Dal CHOI

IPC: H10B43/27 ,  H01L23/00 ,  H01L25/065 ,  H10B41/27 ,  H10B41/41 ,  H10B43/40 ,  H10B80/00

Abstract: The present technology relates to a semiconductor memory device and a method of manufacturing the same. The semiconductor memory device includes a first stack structure, a plurality of first slits passing through the first stack structure in a vertical direction and extending in a first horizontal direction orthogonal to the vertical direction, a first source line layer contacting an a top portion of the first stack structure, a second source line layer directly contacting the first source line layer, a second stack structure contacting the second source line layer and overlapping with the first stack structure in the vertical direction, and a plurality of second slits passing through the second stack structure in the vertical direction and extending in a second horizontal direction orthogonal to the vertical direction.

公开(公告)号：US20250071966A1

公开(公告)日：2025-02-27

申请号：US18581384

申请日：2024-02-20

Applicant: SK hynix Inc.

Inventor： Seung Hwan KIM ,  Gil Seop KIM ,  Hye Won YOON

IPC: H10B12/00

Abstract: A method for fabricating a semiconductor device includes forming a stack body including a plurality of recess target layers over a lower structure; forming sacrificial isolation openings in the stack body; forming sacrificial isolation layers in the sacrificial isolation openings; forming sacrificial vertical openings having bottom surfaces disposed at a lower level than bottom surfaces of the sacrificial isolation openings in the stack body between the sacrificial isolation layers; forming preliminary horizontal layers by recessing the recess target layers through the sacrificial vertical openings; forming sacrificial pillar structures that fill the sacrificial vertical openings; forming cell isolation openings by removing the sacrificial isolation layers; forming horizontal layers by trimming the preliminary horizontal layers through the cell isolation openings; and forming cell isolation layers that fill the cell isolation openings.

公开(公告)号：US20250071965A1

公开(公告)日：2025-02-27

申请号：US18411022

申请日：2024-01-12

Applicant: SK hynix Inc.

Inventor： Min Chul SUNG ,  Sei Yon KIM

IPC: H10B12/00

Abstract: A semiconductor device includes a bit line; a plurality of first semiconductor pillars disposed over the bit line; a plurality of first cell contact plugs disposed between the first semiconductor pillars; a plurality of second semiconductor pillars coupled to the first cell contact plugs; a plurality of second cell contact plugs disposed between the second semiconductor pillars and coupled to the first semiconductor pillars; and a plurality of capacitors respectively coupled to the second semiconductor pillars and the second cell contact plugs.

公开(公告)号：US20250069663A1

公开(公告)日：2025-02-27

申请号：US18632972

申请日：2024-04-11

Applicant: SK hynix Inc.

Inventor： Chi Wook AN

IPC: G11C16/10 ,  G11C16/04 ,  G11C16/08 ,  G11C16/34

Abstract: A memory device includes: a plurality of memory cells; a peripheral circuit for performing a program operation of storing data in the plurality of memory cells; and a program operation control circuit for, in the program operation, controlling the peripheral circuit to perform a foggy program operation of increasing a threshold voltage of the plurality of memory cells to a threshold voltage corresponding to any one state among an erase state and first to sixth foggy program states, and perform a fine program operation of increasing the threshold voltage of the plurality of memory cells to any one state among the erase state and first to fifteenth fine program states.

公开(公告)号：US20250069639A1

公开(公告)日：2025-02-27

申请号：US18945527

申请日：2024-11-13

Applicant: SK hynix Inc.

Inventor： Sang Woo YOON

IPC: G11C11/406 ,  G06F3/06 ,  G11C11/4078 ,  G11C11/408 ,  G11C11/4091 ,  G11C11/4094 ,  G11C29/12

Abstract: An operation method of a memory may include receiving an active command and an active address; determining whether a row corresponding to the active address and a row corresponding to a target row address are able to be substantially simultaneously activated; activating the row corresponding to the active address; and activating the row corresponding to the target row address in response to determining that the row corresponding to the active address and the row corresponding to the target row address are able to be substantially simultaneously activated.

公开(公告)号：US20250068663A1

公开(公告)日：2025-02-27

申请号：US18738064

申请日：2024-06-10

Applicant: SK hynix Inc.

Inventor： Joo Young KIM ,  Tae Young AHN ,  Soo Hong AHN

IPC: G06F16/335

Abstract: A string filter device may include an input buffer group and a string comparator group. The input buffer group may store a plurality of string group data segments. Each of the plurality of string group data segments has a first size and includes a plurality of string data having a variable size. The string comparator group may extract a plurality of different sub-string group data segments having a second size among the plurality of string group data segments, and compare, in parallel, each of the plurality of sub-string group data segments with query data, using a plurality of string comparators.