-
公开(公告)号：US20240405033A1
公开(公告)日：2024-12-05
申请号：US18806578
申请日：2024-08-15
Inventor： Fei AI , Jiyue SONG , Dewei SONG
IPC: H01L27/146 , G02F1/1343 , G02F1/1362 , G02F1/1368 , G06F3/041 , G06V40/13
Abstract: An array substrate, a display panel, and an electronic device are provided. The array substrate includes a substrate, a first conductive layer including a first connection part, a fourth insulating layer disposed on the first conductive layer and provided with a second via, and a second conductive layer disposed on the fourth insulating layer and in the second via. The second conductive layer includes a second electrode, and the second electrode is connected to the first connection part through the second via.
-
公开(公告)号：US20230354624A1
公开(公告)日：2023-11-02
申请号：US17278694
申请日：2021-02-26
Inventor： Jiyue SONG , Fei AI , Dewei SONG , Fan GONG
CPC classification number: H10K30/80 , H10K39/32 , G06V40/1318
Abstract: An array substrate, a display panel, and a display device are provided by the present application. The array substrate includes a base substrate; a light-sensitive component layer disposed on the base substrate, wherein a plurality of light-sensitive components are disposed at intervals in the light-sensitive component layer; and a first light-shielding layer disposed on the light-sensitive component layer. An orthographic projection of the first light-shielding layer on the base substrate partially overlaps with an orthographic projection of each of the light-sensitive components on the array substrate.
-
公开(公告)号：US20230246036A1
公开(公告)日：2023-08-03
申请号：US16966116
申请日：2020-01-17
Inventor： Yuan YAN , Yong XU , Fei AI , Dewei SONG
CPC classification number: H01L27/124 , G06F3/041 , H01L27/1288 , G06F2203/04103
Abstract: A touch array substrate and a manufacturing method thereof, wherein in the touch array substrate, an active layer, an insulating layer, a pixel electrode layer, a metal layer, a planarization layer, and a common electrode layer are sequentially disposed on the buffer layer. The active layer includes a first region corresponding to a source electrode and a second region corresponding to a drain electrode. The pixel electrode layer includes a plurality of base layers. The metal layer is correspondingly disposed on the base layers. The metal layer includes a touch signal line, a data line, and a gate electrode. The common electrode layer includes a touch electrode, the source electrode, and the drain electrode.
-
公开(公告)号：US20250035981A1
公开(公告)日：2025-01-30
申请号：US18915693
申请日：2024-10-15
Inventor： Fei AI , Dewei SONG , Chengzhi LUO
IPC: G02F1/1335 , G02F1/1333 , G02F1/1368
Abstract: The present disclosure provides a display panel and a display device including the display panel. The display panel includes an array substrate including a light inlet side and a light outlet side oppositely arranged, including a plurality of opening regions for passing though light and a plurality of non-opening regions in addition to the plurality of opening regions, and including an insulation structure. The insulation structure includes a first groove located in the opening regions, recessed in a direction from the light outlet side toward the light inlet side, and filled with insulation materials. The insulation materials include a first insulation layer and a second insulation layer disposed on one side of the first insulation layer close to the light inlet side. The second insulation layer has a refractive index less than a refractive index of the first insulation layer.
-
公开(公告)号：US20240421173A1
公开(公告)日：2024-12-19
申请号：US17596881
申请日：2021-12-15
Inventor： Jiyue SONG , Fei AI , Dewei SONG , Fan GONG
IPC: H01L27/146 , G02F1/1333 , G02F1/1368
Abstract: An embodiment of the present application discloses a display panel and a display panel manufacturing method. The photosensitive element and the thin film transistor device are disposed on the same side of the substrate. Some components of the photosensitive element and some components of the thin film transistor device can be manufactured by the same step, and therefore can improve integration of the photosensitive element on the array substrate. Furthermore, the photosensitive element can be integrated in the display panel with reduced photomasks and a lowered cost.
-
Patent Agency Ranking
公开(公告)号：US20240234576A1
公开(公告)日：2024-07-11
申请号：US17925085
申请日：2022-11-04
Inventor： Zhifu LI , Guanghui LIU , Fei AI , Dewei SONG , Chengzhi LUO
IPC: H01L29/786 , H01L27/12 , H01L29/66
CPC classification number: H01L29/78642 , H01L27/1222 , H01L27/127 , H01L29/6675 , H01L29/78618 , H01L29/78633 , H01L29/78672 , H01L29/78696
Abstract: The present application provides a thin-film transistor having a vertical structure and an electronic device. In the thin-film transistor having the vertical structure, the thin-film transistor includes a first doped portion and a second portion, the second doped portion is connected to and partly in contact with a channel portion through a via hole by arranging the second doped portion in the via hole of an insulating layer, which can reduce a contact area between the second doped portion and the channel portion, thereby reducing ions diffusing into a channel region and improving device stability of the thin-film transistor. Also, in the thin-film transistor having the vertical structure, a projection area of the thin-film transistor can be reduced, improving an aperture ratio of a display panel.
-
公开(公告)号：US20230282021A1
公开(公告)日：2023-09-07
申请号：US17598517
申请日：2021-07-01
Inventor： Dewei SONG , Fei AI , Jiyue SONG
CPC classification number: G06V40/1306 , H01L27/1288 , H01L27/1222 , H01L27/127 , G06V40/1318
Abstract: An array substrate, a manufacturing method thereof, and a display device are provided. The array substrate includes a substrate, a metal electrode layer, a first passivation layer, a first electrode layer, a photosensitive semiconductor layer, a second passivation layer, and a second electrode layer. The first electrode layer and the photosensitive semiconductor layer are both disposed on a surface of the first passivation layer away from the metal electrode layer.
-
公开(公告)号：US20250072093A1
公开(公告)日：2025-02-27
申请号：US17925002
申请日：2022-11-07
Inventor： Zhifu LI , Guanghui LIU , Fei AI , Dewei SONG , Zhuang LI
IPC: H01L29/45 , H01L29/49 , H01L29/786
Abstract: A display panel is provided. The display panel includes a substrate and includes a first ohmic contact structure, a first boss, a second ohmic contact structure, a semiconductor structure, and a gate which are stacked on the substrate. The first boss includes at least one sidewall. By arranging the semiconductor structure on the sidewall of the first boss, a length of a channel can be shortened by using an existing technology, and a dimension of a thin film transistor can be reduced, so that an integration level of the thin film transistor in the display panel can be improved.
-
公开(公告)号：US20240194792A1
公开(公告)日：2024-06-13
申请号：US18086890
申请日：2022-12-22
Inventor： Zhifu LI , Guanghui LIU , Fei AI , Dewei SONG , Zhuang LI
IPC: H01L29/786 , H01L29/417
CPC classification number: H01L29/78696 , H01L29/41733
Abstract: The present application provides a thin film transistor substrate and an electronic device. The thin film transistor substrate includes: a substrate; a boss including an undercut structure, the undercut structure is located on a side wall of the boss; a filler located in the undercut structure; and an active layer located on the boss and the substrate, the active layer includes a channel, and the channel covers the undercut structure and the filler.
-
公开(公告)号：US20240038765A1
公开(公告)日：2024-02-01
申请号：US17621257
申请日：2021-12-09
Inventor： Fei AI , Dewei SONG , Chengzhi LUO
IPC: H01L27/12 , G02F1/1362
CPC classification number: H01L27/1218 , G02F1/136227 , H01L27/124
Abstract: An array substrate and a display panel are provided. The array substrate includes a substrate, an array layer, an inorganic insulation layer, a conductive electrode, a passivation layer, and a pixel electrode disposed in sequence. The array layer includes a source electrode and a drain electrode. A first via hole is defined in the array substrate. The first via hole penetrates the passivation layer and the inorganic insulation layer and exposes the drain electrode. The pixel electrode is connected to the drain electrode in the first via hole.
-
-
-
-
-
-
-
-
-
Search Results
28
records
(took 0.021 seconds)
