知搜-全球专利检索

  1. 登录
  2. 注册

搜索结果

9 条记录 (耗时 0.016 秒)

    Electronic apparatus interconnect routing
    1.
    发明授权
    Electronic apparatus interconnect routing 有权
    电子设备互连路由

    公开(公告)号：US07741718B2

    公开(公告)日：2010-06-22

    申请号：US12624005

    申请日：2009-11-23

    申请人： Suman K. Banerjee ,  Alain C. Duvalley ,  Olin L. Hartin ,  Craig Jasper ,  Walter Parmon

    发明人： Suman K. Banerjee ,  Alain C. Duvalley ,  Olin L. Hartin ,  Craig Jasper ,  Walter Parmon

    IPC分类号： H01L29/40

    CPC分类号： H01L23/528 ,  H01L27/0805 ,  H01L2924/0002 ,  H01L2924/00

    摘要： Apparatus are provided for routing interconnects of a dual-gate electronic device operating in a differential configuration. An electronic apparatus formed on a substrate is provided comprising a first interconnect (40, 42, 44) configured to couple to a first region of the substrate, a first gate (22, 24, 26, 28) coupled to the first interconnect and configured to receive a first differential input, a second interconnect (30, 32, 34, 36, 38) parallel to the first interconnect and configured to couple to a second region of the substrate, and a second gate (20) coupled to the second interconnect and configured to receive a second differential input. The first gate is parallel to the first interconnect, and the second gate is parallel to the second interconnect.

    摘要翻译： 提供了用于布置以差分配置操作的双门电子设备的互连的设备。 提供了一种形成在基板上的电子设备，包括被配置为耦合到所述基板的第一区域的第一互连（40,42,44），耦合到所述第一互连并配置的第一栅极（22,24,26,28） 接收第一差分输入，平行于第一互连并被配置为耦合到衬底的第二区域的第二互连（30,32,34,36,38）以及耦合到第二互连的第二栅极（20） 并且被配置为接收第二差分输入。 第一栅极平行于第一互连，第二栅极平行于第二互连。

    Electronic apparatus interconnect routing and interconnect routing method for minimizing parasitic resistance
    4.
    发明申请
    Electronic apparatus interconnect routing and interconnect routing method for minimizing parasitic resistance 有权
    用于最小化寄生电阻的电子设备互连路由和互连路由方法

    公开(公告)号：US20070132062A1

    公开(公告)日：2007-06-14

    申请号：US11302007

    申请日：2005-12-09

    申请人： Suman Banerjee ,  Alain Duvallet ,  Olin Hartin ,  Craig Jasper ,  Walter Parmon

    发明人： Suman Banerjee ,  Alain Duvallet ,  Olin Hartin ,  Craig Jasper ,  Walter Parmon

    IPC分类号： H01L29/00

    CPC分类号： H01L23/528 ,  H01L27/0805 ,  H01L2924/0002 ,  H01L2924/00

    摘要： Method and apparatus are provided for routing interconnects of a dual-gate electronic device operating in a differential configuration. An electronic apparatus formed on a substrate is provided comprising a first interconnect (40, 42, 44) configured to couple to a first region of the substrate, a first gate (22, 24, 26, 28) coupled to the first interconnect and configured to receive a first differential input, a second interconnect (30, 32, 34, 36, 38) parallel to the first interconnect and configured to couple to a second region of the substrate, and a second gate (20) coupled to the second interconnect and configured to receive a second differential input. The first gate is parallel to the first interconnect, and the second gate is parallel to the second interconnect.

    摘要翻译： 提供了用于路由以差分配置工作的双门电子设备的互连的方法和装置。 提供了一种形成在基板上的电子设备，包括被配置为耦合到所述基板的第一区域的第一互连（40,42,44），耦合到所述第一互连并配置的第一栅极（22,24,26,28） 接收第一差分输入，平行于第一互连并被配置为耦合到衬底的第二区域的第二互连（30,32,34,36,38）以及耦合到第二互连的第二栅极（20） 并且被配置为接收第二差分输入。 第一栅极平行于第一互连，第二栅极平行于第二互连。

    Radar module
    6.
    发明申请
    Radar module 有权
    雷达模块

    公开(公告)号：US20120119932A1

    公开(公告)日：2012-05-17

    申请号：US12945828

    申请日：2010-11-12

    申请人： James MacDonald ,  William McKinzie, III ,  Walter Parmon ,  Lawrence Rubin

    发明人： James MacDonald ,  William McKinzie, III ,  Walter Parmon ,  Lawrence Rubin

    IPC分类号： H01Q17/00

    CPC分类号： H01Q17/00 ,  G01S7/032 ,  H01Q1/425 ,  H01Q19/062 ,  H01Q19/13 ,  H01Q19/17 ,  H01Q23/00

    摘要： An integrated antenna package includes an interposer, an integrated circuit die, and a cap that forms a cavity within the integrated antenna package. A lossy EBG structure resides at the cap overlying the integrated circuit device. A lossless EBG structure resides at the cap overlying a microstrip feedline. A radar module includes a plurality of receive portions, each receive portion including a parabolic structure having a reflective surface, an absorber structure, a lens, and an antenna.

    摘要翻译： 集成天线封装包括内插器，集成电路管芯和在集成天线封装内形成空腔的盖。 有损EBG结构位于覆盖集成电路器件的盖子上。 无损的EBG结构位于覆盖微带馈线的帽子上。 雷达模块包括多个接收部分，每个接收部分包括具有反射表面的抛物线结构，吸收体结构，透镜和天线。

    System for reducing electromagnetic induction interference
    7.
    发明授权
    System for reducing electromagnetic induction interference 有权
    降低电磁感应干扰的系统

    公开(公告)号：US09190708B2

    公开(公告)日：2015-11-17

    申请号：US13785482

    申请日：2013-03-05

    申请人： Walter Parmon

    发明人： Walter Parmon

    IPC分类号： H04B3/28 ,  H01P11/00 ,  H01P1/20 ,  H05K1/02

    CPC分类号： H01P11/007 ,  H01P1/20 ,  H01P1/2005 ,  H05K1/0236

    摘要： An electromagnetic band gap device is provided, comprising: a conductive plane; a non-conductive substrate located over the conductive plane; and an electromagnetic band gap unit cell that includes a first via located in the non-conductive substrate and filled with a conductive material, a second via located in the non-conductive substrate and filled with the conductive material, a first conductive surface located on the non-conductive substrate over the first via, and a second conductive surface located on the non-conductive substrate over the second via, wherein the electromagnetic band gap unit cell is configured to operate as an LC resonant circuit in conjunction with the conductive plane, at least one gap is located in the electromagnetic band gap unit cell, the at least one gap being located in the first via, in the first conductive surface, in the second conductive surface, and in the second via.

    摘要翻译： 提供一种电磁带隙装置，包括：导电平面; 位于导电平面上方的非导电衬底; 以及电磁带隙单元，其包括位于所述非导电衬底中并且填充有导电材料的第一通孔，位于所述非导电衬底中并填充有所述导电材料的第二通孔，位于所述非导电衬底上的第一导电表面 在第一通孔上方的非导电衬底以及位于第二通孔上的非导电衬底上的第二导电表面，其中电磁带隙单元被配置为与导电平面一起作为LC谐振电路工作， 所述至少一个间隙位于所述电磁带隙单位电池中，所述至少一个间隙位于所述第一通孔中，所述第一导电表面中，所述第二导电表面中以及所述第二通孔中。

    Electronic apparatus interconnect routing and interconnect routing method for minimizing parasitic resistance
    8.
    发明授权
    Electronic apparatus interconnect routing and interconnect routing method for minimizing parasitic resistance 有权
    用于最小化寄生电阻的电子设备互连路由和互连路由方法

    公开(公告)号：US07683486B2

    公开(公告)日：2010-03-23

    申请号：US11302007

    申请日：2005-12-09

    申请人： Suman K. Banerjee ,  Alain C. Duvallet ,  Craig Jasper ,  Olin L. Hartin ,  Walter Parmon

    发明人： Suman K. Banerjee ,  Alain C. Duvallet ,  Craig Jasper ,  Olin L. Hartin ,  Walter Parmon

    IPC分类号： H01L29/40

    CPC分类号： H01L23/528 ,  H01L27/0805 ,  H01L2924/0002 ,  H01L2924/00

    摘要： Method and apparatus are provided for routing interconnects of a dual-gate electronic device operating in a differential configuration. An electronic apparatus formed on a substrate is provided comprising a first interconnect (40, 42, 44) configured to couple to a first region of the substrate, a first gate (22, 24, 26, 28) coupled to the first interconnect and configured to receive a first differential input, a second interconnect (30, 32, 34, 36, 38) parallel to the first interconnect and configured to couple to a second region of the substrate, and a second gate (20) coupled to the second interconnect and configured to receive a second differential input. The first gate is parallel to the first interconnect, and the second gate is parallel to the second interconnect.

    摘要翻译： 提供了用于路由以差分配置工作的双门电子设备的互连的方法和装置。 提供了一种形成在基板上的电子设备，包括被配置为耦合到所述基板的第一区域的第一互连（40,42,44），耦合到所述第一互连并配置的第一栅极（22,24,26,28） 接收第一差分输入，平行于第一互连并被配置为耦合到衬底的第二区域的第二互连（30,32,34,36,38）以及耦合到第二互连的第二栅极（20） 并且被配置为接收第二差分输入。 第一栅极平行于第一互连，第二栅极平行于第二互连。

    ELECTRONIC APPARATUS INTERCONNECT ROUTING
    9.
    发明申请
    ELECTRONIC APPARATUS INTERCONNECT ROUTING 有权
    电子装置互连路由器

    公开(公告)号：US20100065968A1

    公开(公告)日：2010-03-18

    申请号：US12624005

    申请日：2009-11-23

    申请人： Suman K. Banerjee ,  Alain C. Duvallet ,  Olin L. Hartin ,  Craig Jasper ,  Walter Parmon

    发明人： Suman K. Banerjee ,  Alain C. Duvallet ,  Olin L. Hartin ,  Craig Jasper ,  Walter Parmon

    IPC分类号： H01L23/532

    CPC分类号： H01L23/528 ,  H01L27/0805 ,  H01L2924/0002 ,  H01L2924/00

    摘要： Apparatus are provided for routing interconnects of a dual-gate electronic device operating in a differential configuration. An electronic apparatus formed on a substrate is provided comprising a first interconnect (40, 42, 44) configured to couple to a first region of the substrate, a first gate (22, 24, 26, 28) coupled to the first interconnect and configured to receive a first differential input, a second interconnect (30, 32, 34, 36, 38) parallel to the first interconnect and configured to couple to a second region of the substrate, and a second gate (20) coupled to the second interconnect and configured to receive a second differential input. The first gate is parallel to the first interconnect, and the second gate is parallel to the second interconnect.

    摘要翻译： 提供了用于布置以差分配置操作的双门电子设备的互连的设备。 提供了一种形成在基板上的电子设备，包括被配置为耦合到所述基板的第一区域的第一互连（40,42,44），耦合到所述第一互连并配置的第一栅极（22,24,26,28） 接收第一差分输入，平行于第一互连并被配置为耦合到衬底的第二区域的第二互连（30,32,34,36,38）以及耦合到第二互连的第二栅极（20） 并且被配置为接收第二差分输入。 第一栅极平行于第一互连，第二栅极平行于第二互连。