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公开(公告)号：US10078992B2
公开(公告)日：2018-09-18
申请号：US14783095
申请日：2015-08-10
Inventor： Juncheng Xiao , Mang Zhao , Yong Tian
CPC classification number: G09G3/3674 , G09G2310/0286 , G09G2320/0223 , G09G2320/041 , G09G2330/021 , G11C19/28
Abstract: A scan driving circuit is disclosed for executing a driving operation for cascaded scan lines and includes a pull-down control module, a pull-down module, a reset control module, a reset module, a down-stream module, a first bootstrap capacitor, a constant low-level voltage source utilized, and a constant high-level voltage source. The whole structure of the disclosed scan driving circuit is simple, and power consumption is low.
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公开(公告)号：US11822200B2
公开(公告)日：2023-11-21
申请号：US16966106
申请日：2020-06-19
Inventor： Yanyang Li , Mang Zhao , Yong Tian
IPC: G02F1/1368 , G06F3/041 , G02F1/1333 , G02F1/1335 , G02F1/1362 , H01L27/12
CPC classification number: G02F1/1368 , G02F1/13338 , G02F1/133514 , G02F1/136286 , G06F3/0412 , G06F3/04164 , H01L27/124
Abstract: A thin film transistor array substrate and a touch display panel are provided, including a plurality of touch electrodes. The touch electrodes include a first touch electrode, a second touch electrode, and a third touch electrode arranged along a first direction. A number of the touch traces electrically connected between the second touch electrode and the first common power line is greater than or equal to a number of the touch traces electrically connected between the first touch electrode and the first common power line, and is less than a number of the touch traces electrically connected between the third touch electrode and the first common power line.
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公开(公告)号：US11531421B2
公开(公告)日：2022-12-20
申请号：US17260154
申请日：2020-06-17
Inventor： Mang Zhao , Yanyang Li , Yong Tian
IPC: G06F3/041 , G06F3/044 , G02F1/1333 , G02F1/1343 , G02F1/1362 , G02F1/1368 , G02F1/1335
Abstract: The present application provides a thin film transistor array substrate and a touch display panel including a plurality of touch electrodes, and the touch electrodes including a first touch electrode, a second touch electrode, and a third touch electrode arranged in a first direction. A number of touch trace electrically connected to the second touch electrode and the driver chip is greater than or equal to a number of touch trace electrically connected to the first touch electrode and the driver chip, and is less than a number of touch trace electrically connected to the third touch electrode and the driver chip.
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公开(公告)号：US09835917B2
公开(公告)日：2017-12-05
申请号：US14773355
申请日：2015-08-11
IPC: G01R31/28 , G02F1/1345 , G02F1/1362 , G02F1/1368 , H01L21/66 , H01L27/12 , H01L29/786 , G09G3/00
CPC classification number: G02F1/136286 , G01R31/2825 , G02F1/13454 , G02F1/1368 , G02F2001/136254 , G02F2202/104 , G09G3/006 , G09G2330/12 , H01L22/34 , H01L27/1222 , H01L27/124 , H01L29/78672
Abstract: A baseplate circuit is disclosed. The baseplate comprises an IC region, a plurality of WOA regions, a plurality of GOA regions, and a plurality of switches. Each WOA region comprises a plurality of baseplate conducting wires, each of the baseplate conducting wires is electrically connected with the IC region. Each GOA region comprises a plurality of gate lines, each of the gate lines is electrically connected with one of the baseplate conducting wires. Each of the switches is used to electrically connect one of the gate lines and one of the baseplate conducting wires.
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公开(公告)号：US09799286B2
公开(公告)日：2017-10-24
申请号：US14781293
申请日：2015-08-28
Applicant: Shenzhen China Star Optoelectronics Technology Co., Ltd. , Wuhan China Star Optoelectronics Technology Co., Ltd.
Inventor： Mang Zhao , Juncheng Xiao , Yong Tian
IPC: G09G3/36
CPC classification number: G09G3/3648 , G09G3/3677 , G09G2300/0408 , G09G2300/0809 , G09G2310/08
Abstract: A GOA circuit and LCD are disclosed. The GOA circuit includes cascaded GOA units and a control module. Each of the GOA units is driven by a first level of transfer clock, a second level of transfer clock, a first control clock and a second control clock to charge horizontal signal lines corresponding to a display area. The control module masks the first level of transfer clock and the second level of transfer clock when all of the horizontal signal lines are charged completely by the GOA circuit, such that the gate driving signals on the horizontal signal lines are discharged until the level equals to the predetermined level. In this way, the horizontal signal lines are prevented from generating redundant pulse signals before the first gate driving signals are outputted, which ensures the normal operations of the GOA circuit.
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Patent Agency Ranking
公开(公告)号：US09628050B2
公开(公告)日：2017-04-18
申请号：US14783100
申请日：2015-08-10
Inventor： Mang Zhao , Yong Tian , Gui Chen , Caiqin Chen , Xin Zhang
CPC classification number: H03K3/012 , G09G3/3677 , G09G2300/0408 , G09G2300/0814 , G09G2310/0202 , G09G2310/0289
Abstract: A scan driving circuit configured for driving cascaded scan lines is provided, which includes an input control module, a latch module, a driving-signal generation module, an output control module, a constant high voltage source and a constant low voltage source. The scan driving circuit of the present invention drives the input control module through cascade signals of a preceding stage and cascade signals of a succeeding stage, so as to reduce interference and the driving power consumption of the scan driving circuit.
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公开(公告)号：US10861396B2
公开(公告)日：2020-12-08
申请号：US16463370
申请日：2018-12-19
Inventor： Mang Zhao , Lihua Zheng , Yong Tian
IPC: G09G3/3266 , G09G3/3275 , G09G3/36 , G02F1/1362 , G02F1/1368 , H01L27/32 , G09G3/20
Abstract: A driving method of a display panel is provided, including setting the first red, first green, first blue, second red, second green, and second blue multiplexed signals. In the 2i−1th multiplexing period, the charging time of the sub-pixels corresponding to the switching units controlled by the first red, the first green, and the first blue multiplexed signals is earlier than that controlled by the second red, the second green, and the second blue multiplexed signals. While In the 2ith multiplexing period, the charging time of the sub-pixels corresponding to the switching units controlled by the first red, the first green, and the first blue multiplexed signals is later than that controlled by the second red, the second green, and the second blue multiplexed signals. The method will eliminate the stripe feeling of the scream picture displayed on the display panel and so improve the display quality.
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公开(公告)号：US10042223B2
公开(公告)日：2018-08-07
申请号：US14888971
申请日：2015-07-31
Applicant: Shenzhen China Star Optoelectronics Technology Co., Ltd. , Wuhan China Star Optoelectronics Technology Co., Ltd
Inventor： Mang Zhao , Yong Tian , Caiqin Chen
IPC: H02H9/00 , G02F1/1362 , G09G3/36 , G02F1/1368 , H01L27/12 , H01L27/02 , H02H9/04
Abstract: The present disclosure relates to an array substrate, a display panel and a display device. The array substrate includes GND wirings and GOA areas. The GND wirings are configured at outer sides of the GOA areas, and the GOA area includes a variety of GOA signal lines and N-th stage GOA circuits electrically connected by the GOA signal lines. A first ESD protection circuit is configured in a middle area between the 1-th stage GOA circuit and the N-th stage GOA circuit to discharge abnormal electrical charges of the GOA signal lines within the middle area. With such configuration, better ESD protection capability is provided between the GOA signal lines.
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公开(公告)号：US09935127B2
公开(公告)日：2018-04-03
申请号：US14783870
申请日：2015-08-21
IPC: H01L29/417 , H01L27/12 , H01L29/786 , H01L27/092 , H03K5/135 , H01L27/32
CPC classification number: H01L27/1222 , H01L27/092 , H01L27/1225 , H01L27/124 , H01L27/1248 , H01L29/41733 , H01L29/78603 , H01L29/78606 , H01L29/78633 , H01L29/78648 , H01L29/78675 , H03K5/135
Abstract: A control circuit of a thin film transistor, comprising: a substrate; a silicon nitride layer disposed on the substrate; a silicon dioxide layer disposed on the silicon nitride layer; a light shielding layer disposed inside the silicon nitride layer, which comprising a first light shielding region and a second light shielding region; at least one N type metal oxide semiconductor disposed on the silicon dioxide layer at a position corresponding to the first light shielding region; at least one P type metal oxide semiconductor disposed on the silicon dioxide layer at a position corresponding to the second light shielding region; each of the N type metal oxide semiconductor and the P type metal oxide semiconductor has a gate electrode layer, a first control signal received by voltage pulses of the gate electrode layer synchronized with a second control signal received by the light shielding layer in voltage variation.
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公开(公告)号：US09928793B2
公开(公告)日：2018-03-27
申请号：US14785043
申请日：2015-08-10
Inventor： Mang Zhao , Juncheng Xiao , Yong Tian
IPC: G09G3/36
CPC classification number: G09G3/3677 , G09G3/3266 , G09G3/3696 , G09G2300/043 , G09G2310/0267 , G09G2310/0286
Abstract: The present invention provides a scanning driving circuit for executing a driving operation to cascaded scanning lines, the scanning driving circuit includes a pull-down control module, a pull-down module, a reset module, a down link module, a first bootstrap capacitor, a constant low voltage level source, and a constant high voltage level source; wherein a cascading manner of the clock signal is determined according to a scanning order of the scanning driving circuit, for the reset module to pull up the corresponding scanning signal of the scanning line. The structure of the scanning driving circuit of the present invention is simple and highly dependable.
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